PIC18FXX20
17.0
MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
Master SSP (MSSP) Module
Overview
17.3
SPI Mode
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four
modes of SPI are supported. To accomplish communi-
cation, typically three pins are used:
• Serial Data Out (SDO) - RC5/SDO
• Serial Data In (SDI) - RC4/SDI/SDA
• Serial Clock (SCK) - RC3/SCK/SCL/LVDIN
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) - RF7/SS
module when operating in SPI mode.
17.1
The Master Synchronous Serial Port (MSSP) module is
a serial interface, useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers, dis-
play drivers, A/D converters, etc. The MSSP module
can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
2
C)
- Full Master mode
- Slave mode (with general address call)
The I
2
C interface supports the following modes in
hardware:
• Master mode
• Multi-Master mode
• Slave mode
FIGURE 17-1:
MSSP BLOCK DIAGRAM
(SPI MODE)
Internal
Data Bus
Read
SSPBUF reg
Write
17.2
Control Registers
The MSSP module has three associated registers.
These include a status register (SSPSTAT) and two
control registers (SSPCON1 and SSPCON2). The use
of these registers and their individual configuration bits
differ significantly, depending on whether the MSSP
module is operated in SPI or I
2
C mode.
Additional details are provided under the individual
sections.
RC4/SDI/SDA
SSPSR reg
RC5/SDO
bit0
Shift
Clock
RF7/SS
SS Control
Enable
Edge
Select
2
Clock Select
SSPM3:SSPM0
SMP:CKE 4
TMR2 Output
2
2
Edge
Select
Prescaler T
OSC
4, 16, 64
RC3/SCK/
SCL
(
)
Data to TX/RX in SSPSR
TRIS bit
2003 Microchip Technology Inc.
Advance Information
DS39609A-page 157