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PIC18LF6620-I/PT 参数 Datasheet PDF下载

PIC18LF6620-I/PT图片预览
型号: PIC18LF6620-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 八十〇分之六十四引脚高性能1 Mbit的增强型闪存微控制器与A / D [64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D]
分类和应用: 闪存微控制器和处理器外围集成电路PC时钟
文件页数/大小: 366 页 / 6797 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18FXX20  
16.4.3  
SETUP FOR PWM OPERATION  
The following steps should be taken when configuring  
the CCP module for PWM operation:  
1. Set the PWM period by writing to the PR2 register.  
2. Set the PWM duty cycle by writing to the  
CCPR1L register and CCP1CON<5:4> bits.  
3. Make the CCP1 pin an output by clearing the  
TRISC<2> bit.  
4. Set the TMR2 prescale value and enable Timer2  
by writing to T2CON.  
5. Configure the CCP1 module for PWM operation.  
TABLE 16-3: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz  
PWM Frequency  
2.44 kHz  
9.77 kHz  
39.06 kHz 156.25 kHz 312.50 kHz 416.67 kHz  
Timer Prescaler (1, 4, 16)  
PR2 Value  
Maximum Resolution (bits)  
16  
FFh  
14  
4
FFh  
12  
1
FFh  
10  
1
3Fh  
8
1
1Fh  
7
1
17h  
6.58  
TABLE 16-4: REGISTERS ASSOCIATED WITH PWM, TIMER2 AND TIMER4  
Value on  
Value on  
POR, BOR  
Name  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
all other  
RESETS  
INTCON  
RCON  
PIR1  
PIE1  
IPR1  
PIR2  
PIE2  
IPR2  
PIR3  
PIE3  
IPR3  
TMR2  
PR2  
GIE/GIEH PEIE/GIEL TMR0IE  
INT0IE  
RI  
RBIE  
TO  
TMR0IF  
PD  
INT0IF  
POR  
RBIF  
BOR  
0000 00000000 0000  
IPEN  
PSPIF  
PSPIE  
PSPIP  
ADIF  
ADIE  
ADIP  
CMIE  
CMIF  
CMIP  
RCIF  
RCIE  
RCIP  
RC2IF  
RC2IE  
RC2IP  
0--1 11qq0--q qquu  
TXIF  
TXIE  
TXIP  
EEIE  
EEIF  
EEIP  
TX2IF  
TX2IE  
TX2IP  
SSPIF  
SSPIE  
SSPIP  
BCLIF  
BCLIE  
BCLIP  
TMR4IF  
TMR4IE  
TMR4IP  
CCP1IF TMR2IF TMR1IF 0000 00000000 0000  
CCP1IE TMR2IE TMR1IE 0000 00000000 0000  
CCP1IP TMR2IP TMR1IP 0111 11110111 1111  
LVDIF  
LVDIE  
LVDIP  
CCP5IF CCP4IF CCP3IF --00 0000--00 0000  
CCP5IE CCP4IE CCP3IE --00 0000--00 0000  
CCP5IP CCP4IP CCP3IP --11 1111--11 1111  
0000 00000000 0000  
TMR3IF CCP2IF -0-0 0000---0 0000  
TMR3IE CCP2IE -0-0 0000---0 0000  
TMR3IP CCP2IP -1-1 1111---1 1111  
Timer2 Module Register  
Timer2 Module Period Register  
1111 11111111 1111  
T2CON  
T3CON  
TMR4  
PR4  
RD16  
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000-000 0000  
T3CCP2 T3CKPS1 T3CKPS0 T3CCP1 T3SYNC TMR3CS TMR3ON 0000 0000uuuu uuuu  
Timer4 Register  
Timer4 Period Register  
0000 0000uuuu uuuu  
1111 1111uuuu uuuu  
T4CON  
CCPRxL  
CCPRxH  
T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0 -000 0000uuuu uuuu  
(1)  
Capture/Compare/PWM Register x (LSB)  
Capture/Compare/PWM Register x (MSB)  
xxxx xxxxuuuu uuuu  
(1)  
(1)  
xxxx xxxxuuuu uuuu  
CCPxCON  
DCxB1  
DCxB0  
CCPxM3 CCPxM2 CCPxM1 CCPxM0 --00 0000--00 0000  
Legend: x= unknown, u= unchanged, - = unimplemented, read as '0'. Shaded cells are not used by PWM, Timer2, or Timer4.  
Note 1: Generic term for all of the identical registers of this name for all CCP modules, where ‘x’ identifies the individual module  
(CCP1 through CCP5). Bit assignments and RESET values for all registers of the same generic name are identical.  
2003 Microchip Technology Inc.  
Advance Information  
DS39609A-page 155  
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