PIC18FXX20
TABLE 1-2:
Pin Name
PIC18FXX20 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin
Buffer
Type
Description
Type
PIC18F6X20 PIC18F8X20
PORTB is a bi-directional I/O port. PORTB
can be software programmed for internal
weak pull-ups on all inputs.
RB0/INT0
RB0
48
47
46
45
58
57
56
55
I/O
I
TTL
ST
Digital I/O.
INT0
External interrupt 0.
RB1/INT1
RB1
I/O
I
TTL
ST
Digital I/O.
External interrupt 1.
INT1
RB2/INT2
RB2
I/O
I
TTL
ST
Digital I/O.
External interrupt 2.
INT2
RB3/INT3/CCP2
RB3
I/O
I/O
I/O
TTL
ST
ST
Digital I/O.
INT3
External interrupt 3.
Capture2 input, Compare2 output,
PWM2 output.
CCP2(1)
RB4/KBI0
RB4
44
43
54
53
I/O
I
TTL
ST
Digital I/O.
KBI0
Interrupt-on-change pin.
RB5/KBI1/PGM
RB5
I/O
I
I/O
TTL
ST
ST
Digital I/O.
KBI1
Interrupt-on-change pin.
PGM
Low voltage ICSP programming enable
pin.
RB6/KBI2/PGC
RB6
42
37
52
47
I/O
I
TTL
ST
Digital I/O.
KBI2
Interrupt-on-change pin.
In-Circuit Debugger and
ICSP programming clock.
PGC
I/O
ST
RB7/KBI3/PGD
RB7
I/O
I/O
TTL
ST
Digital I/O.
KBI3
PGD
Interrupt-on-change pin.
In-Circuit Debugger and
ICSP programming data.
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I
= Input
= Power
O
= Output
= Open Drain (no P diode to VDD)
P
OD
Note 1: Alternate assignment for CCP2 when CCP2MX is not selected (all Operating modes except
Microcontroller).
2: Default assignment when CCP2MX is set.
3: External memory interface functions are only available on PIC18F8X20 devices.
4: CCP2 is multiplexed with this pin by default when configured in Microcontroller mode. Otherwise, it is
multiplexed with either RB3 or RC1.
5: PORTH and PORTJ are only available on PIC18F8X20 (80-pin) devices.
6: AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for proper
operation of the part in User or ICSP modes. See parameter D001A for details.
2003 Microchip Technology Inc.
Advance Information
DS39609A-page 13
MICROCHIP [ MICROCHIP ]
