PIC18FXX20
TABLE 1-2:
PIC18FXX20 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin
Buffer
Type
Pin Name
Description
Type
PIC18F6X20 PIC18F8X20
PORTA is a bi-directional I/O port.
RA0/AN0
RA0
24
23
22
30
29
28
I/O
I
TTL
Digital I/O.
AN0
Analog
Analog input 0.
RA1/AN1
RA1
I/O
I
TTL
Analog
Digital I/O.
Analog input 1.
AN1
RA2/AN2/VREF-
RA2
I/O
I
I
TTL
Analog
Analog
Digital I/O.
AN2
Analog input 2.
VREF-
A/D reference voltage (Low) input.
RA3/AN3/VREF+
21
28
27
27
34
33
RA3
I/O
TTL
Digital I/O.
AN3
VREF+
I
I
Analog
Analog
Analog input 3.
A/D reference voltage (High) input.
RA4/T0CKI
RA4
I/O
I
ST/OD
ST
Digital I/O – Open drain when
configured as output.
Timer0 external clock input.
T0CKI
RA5/AN4/LVDIN
RA5
I/O
I
I
TTL
Analog
Analog
Digital I/O.
AN4
Analog input 4.
LVDIN
Low voltage detect input.
RA6
See the OSC2/CLKO/RA6 pin.
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I
= Input
= Power
O
= Output
= Open Drain (no P diode to VDD)
P
OD
Note 1: Alternate assignment for CCP2 when CCP2MX is not selected (all Operating modes except
Microcontroller).
2: Default assignment when CCP2MX is set.
3: External memory interface functions are only available on PIC18F8X20 devices.
4: CCP2 is multiplexed with this pin by default when configured in Microcontroller mode. Otherwise, it is
multiplexed with either RB3 or RC1.
5: PORTH and PORTJ are only available on PIC18F8X20 (80-pin) devices.
6: AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for proper
operation of the part in User or ICSP modes. See parameter D001A for details.
DS39609A-page 12
AdvanceInformation
2003 Microchip Technology Inc.