PIC18F2220/2320/4220/4320
Demonstration Boards
G
PICDEM 1 ................................................................ 302
PICDEM 17 .............................................................. 302
PICDEM 18R PIC18C601/801 ................................. 303
PICDEM 2 Plus ........................................................ 302
PICDEM 3 PIC16C92X ............................................ 302
PICDEM 4 ................................................................ 302
PICDEM LIN PIC16C43X ........................................ 303
PICDEM USB PIC16C7X5 ....................................... 303
PICDEM.net Internet/Ethernet ................................. 302
Development Support ...................................................... 299
Device Differences ........................................................... 369
Device Overview .................................................................. 7
Features (table) ............................................................ 8
New Core Features ...................................................... 7
Other Special Features ................................................ 7
Direct Addressing ............................................................... 67
GOTO .............................................................................. 276
H
Hardware Multiplier ............................................................ 85
Introduction ................................................................ 85
Operation ................................................................... 85
Performance Comparison .......................................... 85
HSPLL ............................................................................... 20
I
I/O Ports ........................................................................... 101
2
I C Mode
ACK Pulse ........................................................168, 169
Acknowledge Sequence Timing .............................. 188
Baud Rate Generator .............................................. 181
Bus Collision During a Repeated
Start Condition ................................................. 192
Bus Collision During a Start Condition ..................... 190
Bus Collision During a Stop Condition ..................... 193
Clock Arbitration ...................................................... 182
Clock Stretching ....................................................... 174
Effect of a Reset ...................................................... 189
General Call Address Support ................................. 178
Master Mode ............................................................ 179
Master Mode (Reception, 7-bit Address) ................. 187
Master Mode Operation ........................................... 180
Master Mode Reception ........................................... 185
Master Mode Repeated Start
E
ECCP ............................................................................... 141
Auto-Shutdown ........................................................ 149
and Automatic Restart ..................................... 151
Capture and Compare Modes .................................. 142
Outputs .................................................................... 142
Standard PWM Mode ............................................... 142
Start-up Considerations ........................................... 151
Effects of Power Managed Modes on
Various Clock Sources ............................................... 27
Electrical Characteristics .................................................. 305
Enhanced Capture/Compare/PWM (ECCP) .................... 141
Capture Mode. See Capture (ECCP Module).
Condition Timing .............................................. 184
Master Mode Start Condition Timing ....................... 183
Master Mode Transmission ..................................... 185
Multi-Master Communication, Bus Collision
PWM Mode. See PWM (ECCP Module).
Enhanced CCP Auto-Shutdown ....................................... 149
Enhanced PWM Mode. See PWM (ECCP Module).
Equations
16 x 16 Signed Multiplication Algorithm ..................... 86
16 x 16 Unsigned Multiplication Algorithm ................. 86
A/D Acquisition Time ................................................ 216
A/D Minimum Holding Capacitor .............................. 216
Errata ................................................................................... 5
Evaluation and Programming Tools ................................. 303
External Clock Input ........................................................... 21
and Bus Arbitration .......................................... 189
Multi-Master Mode ................................................... 189
Operation ................................................................. 168
Operation in Power Managed Mode ........................ 189
Read/Write Bit Information (R/W Bit) ................168, 169
Registers ................................................................. 164
Serial Clock (RC3/SCK/SCL) ................................... 169
Slave Mode .............................................................. 168
Addressing ....................................................... 168
Reception ........................................................ 169
Transmission ................................................... 169
Stop Condition Timing ............................................. 188
ID Locations ..............................................................237, 254
INCF ................................................................................ 276
INCFSZ ............................................................................ 277
In-Circuit Debugger .......................................................... 254
In-Circuit Serial Programming (ICSP) .......................237, 254
Indirect Addressing
INDF and FSR Registers ........................................... 66
Operation ................................................................... 66
Indirect Addressing Operation ........................................... 67
Indirect File Operand ......................................................... 59
INFSNZ ............................................................................ 277
Initialization Conditions for all Registers .......................46–49
Instruction Cycle ................................................................ 57
Instruction Flow/Pipelining ................................................. 57
Instruction Format ............................................................ 257
F
Fail-Safe Clock Monitor ............................................ 237, 248
Interrupts in Power Managed Modes ....................... 250
POR or Wake-up from Sleep ................................... 250
WDT During Oscillator Failure ................................. 248
Fast Register Stack ............................................................ 56
Firmware Instructions ....................................................... 255
Flash Program Memory ...................................................... 71
Associated Registers ................................................. 79
Control Registers ....................................................... 72
Erase Sequence ........................................................ 76
Erasing ....................................................................... 76
Operation During Code-Protect ................................. 79
Reading ...................................................................... 75
TABLAT Register ....................................................... 74
Table Pointer .............................................................. 74
Boundaries Based on Operation ........................ 74
Table Pointer Boundaries .......................................... 74
Table Reads and Table Writes .................................. 71
Unexpected Termination of Write Operation .............. 79
Write Verify ................................................................ 79
Writing to .................................................................... 77
FSCM. See Fail-Safe Clock Monitor.
2003 Microchip Technology Inc.
DS39599C-page 375
MICROCHIP [ MICROCHIP ]
