PIC18F2220/2320/4220/4320
INDEX
Compare Mode Operation ....................................... 136
External Power-on Reset Circuit
A
A/D ................................................................................... 211
A/D Converter Interrupt, Configuring ....................... 215
Acquisition Requirements ........................................ 216
ADCON0 Register .................................................... 211
ADCON1 Register .................................................... 211
ADCON2 Register .................................................... 211
ADRESH Register ............................................ 211, 214
ADRESL Register .................................................... 211
Analog Port Pins, Configuring .................................. 218
Associated Registers ............................................... 220
Automatic Acquisition Time ...................................... 217
Calculating the Minimum Required
Acquisition Time ............................................... 216
Configuring the Module ............................................ 215
Conversion Clock (TAD) ........................................... 217
Conversion Status (GO/DONE Bit) .......................... 214
Conversions ............................................................. 219
Converter Characteristics ........................................ 341
Operation in Power Managed Modes ...................... 218
Special Event Trigger (CCP) ............................ 136, 220
Use of the CCP2 Trigger .......................................... 220
VREF+ and VREF- References .................................. 216
Absolute Maximum Ratings ............................................. 305
AC (Timing) Characteristics ............................................. 323
Load Conditions for Device
Timing Specifications ....................................... 324
Parameter Symbology ............................................. 323
Temperature and Voltage Specifications ................. 324
Timing Conditions .................................................... 324
Access Bank ...................................................................... 65
ACKSTAT Status Flag ..................................................... 185
ADCON0 Register ............................................................ 211
GO/DONE Bit ........................................................... 214
ADCON1 Register ............................................................ 211
ADCON2 Register ............................................................ 211
ADDLW ............................................................................ 261
Addressable Universal Synchronous Asynchronous
Receiver Transmitter. See USART.
(Slow VDD Power-up) ........................................ 44
Fail-Safe Clock Monitor ........................................... 248
Generic I/O Port Operation ...................................... 101
Interrupt Logic ............................................................ 88
Low-Voltage Detect (LVD) ....................................... 232
Low-Voltage Detect (LVD) with External Input ........ 232
MCLR/VPP/RE3 Pin ................................................. 111
2
MSSP (I C Master Mode) ........................................ 179
2
MSSP (I C Mode) .................................................... 164
MSSP (SPI Mode) ................................................... 155
On-Chip Reset Circuit ................................................ 43
PIC18F2220/2320 ....................................................... 9
PIC18F4220/4320 ..................................................... 10
PLL ............................................................................ 20
PORTC (Peripheral Output Override) ...................... 107
PORTD and PORTE (Parallel Slave Port) ............... 114
PWM (Enhanced) .................................................... 143
PWM (Standard) ...................................................... 138
RA3:RA0 and RA5 Pins ........................................... 102
RA4/T0CKI Pin ........................................................ 102
RA6 Pin ................................................................... 102
RA7 Pin ................................................................... 102
RB2:RB0 Pins .......................................................... 105
RB3/CCP2 Pin ......................................................... 105
RB4 Pin ................................................................... 105
RB7:RB5 Pins .......................................................... 104
RD4:RD0 Pins ......................................................... 110
RD7:RD5 Pins ......................................................... 109
RE2:RE0 Pins .......................................................... 111
Reads from Flash Program Memory .......................... 75
System Clock ............................................................. 25
Table Read Operation ............................................... 71
Table Write Operation ................................................ 72
Table Writes to Flash Program Memory .................... 77
Timer0 in 16-bit Mode .............................................. 118
Timer0 in 8-bit Mode ................................................ 118
Timer1 ..................................................................... 122
Timer1 (16-bit Read/Write Mode) ............................ 122
Timer2 ..................................................................... 128
Timer3 ..................................................................... 130
Timer3 (16-bit Read/Write Mode) ............................ 130
USART Receive ....................................................... 204
USART Transmit ...................................................... 202
Watchdog Timer ...................................................... 245
BN .................................................................................... 264
BNC ................................................................................. 265
BNN ................................................................................. 265
BNOV ............................................................................... 266
BNZ .................................................................................. 266
BOR. See Brown-out Reset.
ADDWF ............................................................................ 261
ADDWFC ......................................................................... 262
ADRESH Register ............................................................ 211
ADRESL Register .................................................... 211, 214
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................ 262
ANDWF ............................................................................ 263
Assembler
MPASM Assembler .................................................. 299
B
Bank Select Register (BSR) ............................................... 65
Baud Rate Generator ....................................................... 181
BC .................................................................................... 263
BCF .................................................................................. 264
BF Status Flag ................................................................. 185
Block Diagrams
BOV ................................................................................. 269
BRA ................................................................................. 267
BRG. See Baud Rate Generator.
Brown-out Reset (BOR) ..............................................44, 237
BSF .................................................................................. 267
BTFSC ............................................................................. 268
BTFSS ............................................................................. 268
BTG ................................................................................. 269
BZ .................................................................................... 270
A/D ........................................................................... 214
Analog Input Model .................................................. 215
Baud Rate Generator ............................................... 181
Capture Mode Operation ......................................... 135
Comparator I/O Operating Modes ............................ 222
Comparator Output .................................................. 224
Comparator Voltage Reference ............................... 228
2003 Microchip Technology Inc.
DS39599C-page 373
MICROCHIP [ MICROCHIP ]
