PIC18F2220/2320/4220/4320
FIGURE 26-21:
USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
121
121
RC7/RX/DT
pin
120
Note: Refer to Figure 26-5 for load conditions.
122
TABLE 26-22: USART SYNCHRONOUS TRANSMISSION REQUIREMENTS
Param
Symbol
Characteristic
Min
Max
Units Conditions
No.
120
TCKH2DTV SYNC XMIT (MASTER & SLAVE)
Clock High to Data Out Valid
PIC18FXX20
—
—
—
—
—
—
40
100
20
ns
ns
ns
ns
ns
ns
PIC18LFXX20
121
122
TCKRF
TDTRF
Clock Out Rise Time and Fall Time PIC18FXX20
(Master mode)
PIC18LFXX20
PIC18FXX20
PIC18LFXX20
50
Data Out Rise Time and Fall Time
20
50
FIGURE 26-22:
USART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
125
RC7/RX/DT
pin
126
Note: Refer to Figure 26-5 for load conditions.
TABLE 26-23: USART SYNCHRONOUS RECEIVE REQUIREMENTS
Param.
Symbol
Characteristic
Min
Max
Units
Conditions
No.
125
TDTV2CKL SYNC RCV (MASTER & SLAVE)
Data Hold before CK ↓ (DT hold time)
TCKL2DTL Data Hold after CK ↓ (DT hold time)
10
15
—
—
ns
ns
126
DS39599C-page 340
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
