PIC18F2220/2320/4220/4320
REGISTER 19-2: ADCON1 REGISTER
U-0
—
U-0
—
R/W-0
R/W-0
R/W-q(1) R/W-q(1) R/W-q(1) R/W-q(1)
VCFG1
VCFG0
PCFG3
PCFG2
PCFG1
PCFG0
bit 0
bit 7
bit 7-6
bit 5
Unimplemented: Read as ‘0’
VCFG1: Voltage Reference Configuration bit, VREFL Source
1= VREF- (AN2)
0= AVSS
bit 4
VCFG0: Voltage Reference Configuration bit, VREFH Source
1= VREF+ (AN3)
0= AVDD
bit 3-0
PCFG3:PCFG0: A/D Port Configuration Control bits
PCFG3:
PCFG0
0000(1)
0001
0010
0011
0100
0101
0110
A
A
A
D
D
D
D
D
A
A
A
A
D
D
D
D
A
A
A
A
A
D
D
D
A
A
A
A
A
A
D
D
A
A
A
A
A
A
A
D
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
0111(1)
1000
1001
1010
1011
1100
1101
1110
1111
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
A
D
D
D
D
D
D
D
A
A
D
D
D
D
D
D
A
A
A
D
D
D
D
D
A
A
A
A
D
D
D
D
A
A
A
A
A
D
D
D
A
A
A
A
A
A
D
D
A
A
A
A
A
A
A
D
A = Analog input
D = Digital I/O
Note 1: The POR value of the PCFG bits depends on the value of the PBAD bit in
Configuration Register 3H. When PBAD = 1, PCFG<3:0> = 0000; when PBAD = 0,
PCFG<3:0> = 0111.
2: AN5 through AN7 are available only in PIC18F4X20 devices.
Legend:
R = Readable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
- n = Value at POR
DS39599C-page 212
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
