PIC18F2220/2320/4220/4320
Making the 8 x 8 multiplier execute in a single-cycle
gives the following advantages:
8.0
8.1
8 X 8 HARDWARE MULTIPLIER
• Higher computational throughput
Introduction
• Reduces code size requirements for multiply
algorithms
An 8 x 8 hardware multiplier is included in the ALU of
the PIC18F2X20/4X20 devices. By making the multiply
a hardware operation, it completes in a single instruc-
tion cycle. This is an unsigned multiply that gives a
16-bit result. The result is stored into the 16-bit product
register pair (PRODH:PRODL). The multiplier does not
affect any flags in the Status register.
The performance increase allows the device to be used
in applications previously reserved for Digital Signal
Processors.
Table 8-1 shows a performance comparison between
enhanced devices using the single-cycle hardware
multiply and performing the same function without the
hardware multiply.
TABLE 8-1:
Routine
PERFORMANCE COMPARISON
Program
Time
Cycles
(Max)
Multiply Method
Memory
(Words)
@ 40 MHz @ 10 MHz @ 4 MHz
Without hardware multiply
Hardware multiply
13
1
69
1
6.9 µs
100 ns
9.1 µs
600 ns
24.2 µs
2.8 µs
25.4 µs
4.0 µs
27.6 µs
400 ns
36.4 µs
2.4 µs
69 µs
1 µs
91 µs
6 µs
8 x 8 unsigned
8 x 8 signed
Without hardware multiply
Hardware multiply
33
6
91
6
Without hardware multiply
Hardware multiply
21
28
52
35
242
28
254
40
96.8 µs
11.2 µs
102.6 µs
16.0 µs
242 µs
28 µs
254 µs
40 µs
16 x 16 unsigned
16 x 16 signed
Without hardware multiply
Hardware multiply
EXAMPLE 8-1:
8 x 8 UNSIGNED
MULTIPLY ROUTINE
8.2
Operation
Example 8-1 shows the sequence to do an 8 x 8
unsigned multiply. Only one instruction is required
when one argument of the multiply is already loaded in
the WREG register.
MOVF
ARG1, W
ARG2
;
MULWF
; ARG1 * ARG2 ->
;
PRODH:PRODL
Example 8-2 shows the sequence to do an 8 x 8 signed
multiply. To account for the sign bits of the arguments,
each argument’s Most Significant bit (MSb) is tested
and the appropriate subtractions are done.
EXAMPLE 8-2:
8 x 8 SIGNED MULTIPLY
ROUTINE
MOVF
ARG1, W
ARG2
MULWF
; ARG1 * ARG2 ->
; PRODH:PRODL
BTFSC
SUBWF
ARG2, SB
PRODH, F
; Test Sign Bit
; PRODH = PRODH
;
- ARG1
MOVF
BTFSC
SUBWF
ARG2, W
ARG1, SB
PRODH, F
; Test Sign Bit
; PRODH = PRODH
;
- ARG2
2003 Microchip Technology Inc.
DS39599C-page 85
MICROCHIP [ MICROCHIP ]
