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PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2220/2320/4220/4320  
TABLE 24-2: PIC18FXXX INSTRUCTION SET (CONTINUED)  
16-Bit Instruction Word  
MSb LSb  
Mnemonic,  
Operands  
Status  
Affected  
Description  
Cycles  
Notes  
CONTROL OPERATIONS  
BC  
BN  
n
n
n
n
n
n
n
n
Branch if Carry  
1 (2)  
1 (2)  
1 (2)  
1 (2)  
1 (2)  
1 (2)  
1 (2)  
2
1110 0010 nnnn nnnn None  
1110 0110 nnnn nnnn None  
1110 0011 nnnn nnnn None  
1110 0111 nnnn nnnn None  
1110 0101 nnnn nnnn None  
1110 0001 nnnn nnnn None  
1110 0100 nnnn nnnn None  
1101 0nnn nnnn nnnn None  
1110 0000 nnnn nnnn None  
1110 110s kkkk kkkk None  
1111 kkkk kkkk kkkk  
Branch if Negative  
Branch if Not Carry  
Branch if Not Negative  
Branch if Not Overflow  
Branch if Not Zero  
Branch if Overflow  
Branch Unconditionally  
Branch if Zero  
BNC  
BNN  
BNOV  
BNZ  
BOV  
BRA  
BZ  
n
n, s  
1 (2)  
2
CALL  
Call subroutine 1st word  
2nd word  
CLRWDT  
DAW  
GOTO  
n
Clear Watchdog Timer  
Decimal Adjust WREG  
Go to address 1st word  
2nd word  
1
1
2
0000 0000 0000 0100 TO, PD  
0000 0000 0000 0111 C, DC  
1110 1111 kkkk kkkk None  
1111 kkkk kkkk kkkk  
NOP  
NOP  
POP  
PUSH  
RCALL  
RESET  
RETFIE  
n
No Operation  
No Operation (Note 4)  
Pop top of return stack (TOS)  
Push top of return stack (TOS) 1  
Relative Call  
1
1
1
0000 0000 0000 0000 None  
1111 xxxx xxxx xxxx None  
0000 0000 0000 0110 None  
0000 0000 0000 0101 None  
1101 1nnn nnnn nnnn None  
0000 0000 1111 1111 All  
0000 0000 0001 000s GIE/GIEH,  
PEIE/GIEL  
2
1
2
Software device Reset  
Return from interrupt enable  
s
RETLW  
RETURN  
SLEEP  
k
s
Return with literal in WREG  
Return from Subroutine  
Go into Standby mode  
2
2
1
0000 1100 kkkk kkkk None  
0000 0000 0001 001s None  
0000 0000 0000 0011 TO, PD  
Note 1: When a Port register is modified as a function of itself (e.g., MOVF PORTB, 1, 0), the value used will be that  
value present on the pins themselves. For example, if the data latch is ‘1’ for a pin configured as input and is  
driven low by an external device, the data will be written back with a ‘0’.  
2: If this instruction is executed on the TMR0 register (and where applicable, d = 1), the prescaler will be cleared  
if assigned.  
3: If Program Counter (PC) is modified or a conditional test is true, the instruction requires two cycles. The  
second cycle is executed as a NOP.  
4: Some instructions are 2-word instructions. The second word of these instructions will be executed as a NOP  
unless the first word of the instruction retrieves the information embedded in these 16 bits. This ensures that all  
program memory locations have a valid instruction.  
5: If the table write starts the write cycle to internal memory, the write will continue until terminated.  
2003 Microchip Technology Inc.  
DS39599C-page 259  
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