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PIC18F2320-I/SP 参数 Datasheet PDF下载

PIC18F2320-I/SP图片预览
型号: PIC18F2320-I/SP
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能,增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 388 页 / 6899 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2220/2320/4220/4320  
22.2.1  
REFERENCE VOLTAGE SET POINT  
22.3 Operation During Sleep  
The internal reference voltage of the LVD module may  
be used by other internal circuitry (the Programmable  
Brown-out Reset). If these circuits are disabled (lower  
current consumption), the reference voltage circuit  
requires a time to become stable before a low-voltage  
condition can be reliably detected. This time is invariant  
of system clock speed. This start-up time is specified in  
electrical specification parameter #36. The low-voltage  
interrupt flag will not be enabled until a stable reference  
voltage is reached. Refer to the waveform in Figure 22-4.  
When enabled, the LVD circuitry continues to operate  
during Sleep. If the device voltage crosses the trip  
point, the LVDIF bit will be set and the device will wake-  
up from Sleep. Device execution will continue from the  
interrupt vector address if interrupts have been globally  
enabled.  
22.4 Effects of a Reset  
A device Reset forces all registers to their Reset state.  
This forces the LVD module to be turned off.  
22.2.2  
CURRENT CONSUMPTION  
When the module is enabled, the LVD comparator and  
voltage divider are enabled and will consume static cur-  
rent. The voltage divider can be tapped from multiple  
places in the resistor array. Total current consumption,  
when enabled, is specified in electrical specification  
parameter #D022B.  
2003 Microchip Technology Inc.  
DS39599C-page 235