PIC18F2220/2320/4220/4320
FIGURE 10-16:
PARALLEL SLAVE PORT WRITE WAVEFORMS
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
CS
WR
RD
PORTD<7:0>
IBF
OBF
PSPIF
FIGURE 10-17:
PARALLEL SLAVE PORT READ WAVEFORMS
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
CS
WR
RD
PORTD<7:0>
IBF
OBF
PSPIF
TABLE 10-11: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
Value on
all other
Resets
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PORTD
LATD
Port Data Latch when written; Port pins when read
LATD Data Latch bits
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
1111 1111 1111 1111
---- 0000 ---- 0000
---- -xxx ---- -uuu
0000 -111 0000 -111
0000 000x 0000 000u
TRISD
PORTE
LATE
PORTD Data Direction bits
—
—
—
—
—
—
—
—
RE3
—
RE2
RE1
RE0
LATE Data Latch bits
PORTE Data Direction bits
TMR0IF INT0IF RBIF
TRISE
INTCON
IBF
OBF
IBOV
TMR0IF
PSPMODE
INT0IE
—
GIE/
GIEH
PEIE/
GIEL
RBIE
PIR1
PSPIF
PSPIE
PSPIP
—
ADIF
ADIE
ADIP
—
RCIF
RCIE
TXIF
TXIE
SSPIF
SSPIE
SSPIP
CCP1IF TMR2IF
TMR1IF 0000 0000 0000 0000
PIE1
CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
CCP1IP TMR2IP TMR1IP 1111 1111 1111 1111
IPR1
RCIP
TXIP
ADCON1
Legend:
VCFG1
VCFG0
PCFG3 PCFG2
PCFG1
PCFG0
--00 0000 --00 0000
x= unknown, u= unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by the Parallel Slave Port.
2003 Microchip Technology Inc.
DS39599C-page 115