PIC17C75X
15.2.11 ACKNOWLEDGE SEQUENCE TIMING
15.2.11.1 WCOL STATUS FLAG
An acknowledge sequence is enabled by setting the
If the user writes the SSPBUF when an acknowledege
sequence is in progress, then WCOL is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
acknowledge
sequence
enable
bit,
ACKEN
(SSPCON2<4>). When this bit is set, the SCL pin is
pulled low and the contents of the acknowledge data
bit is presented on the SDA pin. If the user wishes to
generate an acknowledge, then the ACKDT bit should
be cleared. If not, the user should set the ACKDT bit
before starting an acknowledge sequence. The baud
rate generator then counts for one rollover period
(T
), and the SCL pin is de-asserted (pulled high).
BRG
When the SCL pin is sampled high (clock arbitration),
the baud rate generator counts for T . The SCL
BRG
pin is then pulled low for one T
. Following this,
BRG
the ACKEN bit is automatically cleared, the baud rate
generator is turned off, and the SSP module then goes
into IDLE mode. (Figure 15-32)
FIGURE 15-32: ACKNOWLEDGE SEQUENCE TIMING
Acknowledge sequence starts here
Write to SSPCON2
ACKEN automatically cleared
ACKEN = 1, ACKDT = 0
TBRG
TBRG
SDA
SCL
D0
ACK
8
9
SSPIF
Cleared in
software
Set SSPIF at the end
of receive
Cleared in
software
Set SSPIF at the end
of acknowledge sequence
Note: TBRG= one baud rate generator period.
1997 Microchip Technology Inc.
Preliminary
DS30264A-page 155
MICROCHIP [ MICROCHIP ]
