PIC16F913/914/916/917/946
TABLE 19-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT RESET PARAMETERS
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C ≤ TA ≤ +125°C
Param
No.
Symbol
Characteristic
Min.
Typ†
Max. Units
Conditions
30
TMCL
MCLR Pulse Width (low)
2
5
—
—
—
—
μs VDD = 5V, -40°C to +85°C
μs VDD = 5V
31
32
TWDT
TOST
Watchdog Timer Time-out
Period (No Prescaler)
10
10
16
16
29
31
ms VDD = 5V, -40°C to +85°C
ms VDD = 5V
Oscillation Start-up Timer
Period(1, 2)
—
1024
—
TOSC (NOTE 3)
33*
34*
TPWRT Power-up Timer Period
40
—
65
—
140
2.0
ms
TIOZ
I/O High-impedance from
MCLR Low or Watchdog Timer
Reset
μs
35
VBOR
Brown-out Reset Voltage
2.0
2.0
—
—
2.2
2.25
V
V
-40°C to +85°C, (NOTE 4)
-40°C to +125°C, (NOTE 4)
36*
37*
VHYST
TBOR
Brown-out Reset Hysteresis
—
50
—
—
—
mV
Brown-out Reset Minimum
Detection Period
100
μs VDD ≤ VBOR
*
These parameters are characterized but not tested.
†
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: Instruction cycle period (TCY) equals four times the input oscillator time base period. All specified values
are based on characterization data for that particular oscillator type under standard operating conditions
with the device executing code. Exceeding these specified limits may result in an unstable oscillator oper-
ation and/or higher than expected current consumption. All devices are tested to operate at “min” values
with an external clock applied to the OSC1 pin. When an external clock input is used, the “max” cycle time
limit is “DC” (no clock) for all devices.
2: By design.
3: Period of the slower clock.
4: To ensure these voltage tolerances, VDD and VSS must be capacitively decoupled as close to the device as
possible. 0.1 μF and 0.01 μF values in parallel are recommended.
© 2007 Microchip Technology Inc.
DS41250F-page 269
MICROCHIP [ MICROCHIP ]
