PIC16F913/914/916/917/946
FIGURE 1-3:
PIC16F946 BLOCK DIAGRAM
INT
PORTA
PORTB
PORTC
PORTD
Configuration
RA0
RA1
RA2
RA3
RA4
RA5
RA6
RA7
13
8
Data Bus
Program Counter
Flash
8K x 14
Program
Memory
RAM
336 x 8 bytes
File
8-Level Stack (13-bit)
Registers
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RB7
Program
Bus
14
Program Memory Read
(PMR)
RAM Addr
9
Addr MUX
Instruction Reg
Indirect
Addr
7
Direct Addr
8
FSR Reg
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
STATUS Reg
8
Power-up
Timer
3
MUX
Oscillator
Start-up Timer
Instruction
Decode and
Control
Power-on
Reset
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RD7
ALU
OSC1/CLKIN
8
Watchdog
Timer
Timing
Generation
OSC2/CLKOUT
W Reg
Brown-out
Reset
Internal
Oscillator
Block
PORTE
PORTF
PORTG
RE0
RE1
RE2
RE3/MCLR
RE4
RE5
RE6
RE7
VDD
VSS
RF0
RF1
RF2
RF3
RF4
RF5
RF6
RF7
RG0
RG1
RG2
RG3
RG4
RG5
AVDD AVSS
10-bit A/D
Data EEPROM
256 bytes
Timer0
CCP1
Timer1
CCP2
Timer2
SSP
Addressable
USART
Comparators
PLVD
LCD
© 2007 Microchip Technology Inc.
DS41250F-page 17
MICROCHIP [ MICROCHIP ]
