PIC16F913/914/916/917/946
FIGURE 1-2:
PIC16F914/917 BLOCK DIAGRAM
INT
Configuration
13
8
PORTA
Data Bus
Program Counter
RA0
RA1
RA2
RA3
RA4
RA5
RA6
RA7
Flash
4K/8K x 14
Program
Memory
RAM
256/352 bytes
File
8-Level Stack (13-bit)
Registers
Program
Bus
14
Program Memory Read
(PMR)
RAM Addr
9
PORTB
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RB7
Addr MUX
Instruction Reg
Indirect
Addr
7
Direct Addr
8
FSR Reg
STATUS Reg
MUX
8
PORTC
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
3
Power-up
Timer
Instruction
Decode and
Control
Oscillator
Start-up Timer
ALU
OSC1/CLKIN
Power-on
Reset
8
Timing
Generation
PORTD
OSC2/CLKOUT
Watchdog
Timer
W Reg
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RD7
Brown-out
Reset
Internal
Oscillator
Block
VDD
VSS
PORTE
RE0
RE1
RE2
RE3/MCLR
Timer0
Timer1
Timer2
10-bit A/D
Data EEPROM
256 bytes
Addressable
USART
Comparators
CCP1
CCP2
SSP
PLVD
LCD
DS41250F-page 16
© 2007 Microchip Technology Inc.