PIC16F913/914/916/917/946
19.5 DC Characteristics: PIC16F913/914/916/917/946-I (Industrial)
PIC16F913/914/916/917/946-E (Extended)
Standard Operating Conditions (unless otherwise stated)
DC CHARACTERISTICS
Param
Operating temperature
-40°C ≤ TA ≤ +85°C for industrial
-40°C ≤ TA ≤ +125°C for extended
Sym.
Characteristic
Min.
Typ†
Max. Units
Conditions
No.
VIL
Input Low Voltage
I/O Port:
D030
D030A
D031
D032
D033
D033A
with TTL buffer
Vss
Vss
Vss
VSS
VSS
VSS
—
—
—
—
—
—
0.8
V
V
V
V
V
V
4.5V ≤ VDD ≤ 5.5V
0.15 VDD
0.2 VDD
0.2 VDD
0.3
2.0V ≤ VDD ≤ 4.5V
2.0V ≤ VDD ≤ 5.5V
with Schmitt Trigger buffer
(1)
MCLR, OSC1 (RC mode)
OSC1 (XT mode)
OSC1 (HS mode)
Input High Voltage
I/O ports:
0.3 VDD
VIH
—
—
—
—
—
—
—
—
D040
with TTL buffer
2.0
0.25 VDD + 0.8
0.8 VDD
0.8 VDD
1.6
VDD
VDD
VDD
VDD
VDD
VDD
VDD
V
V
V
V
V
V
V
4.5V ≤ VDD ≤ 5.5V
2.0V ≤ VDD ≤ 4.5V
2.0V ≤ VDD ≤ 5.5V
D040A
D041
with Schmitt Trigger buffer
MCLR
D042
D043
OSC1 (XT mode)
OSC1 (HS mode)
OSC1 (RC mode)
D043A
D043B
0.7 VDD
0.9 VDD
(Note 1)
(2)
IIL
Input Leakage Current
D060
I/O ports
—
0.1
1
μA VSS ≤ VPIN ≤ VDD,
Pin at high-impedance
(3)
D061
D063
MCLR
—
—
0.1
0.1
5
5
μA VSS ≤ VPIN ≤ VDD
OSC1
μA VSS ≤ VPIN ≤ VDD, XT, HS and
LP oscillator configuration
D070* IPUR
VOL
PORTB Weak Pull-up Current
50
—
250
—
400
0.6
—
μA VDD = 5.0V, VPIN = VSS
(5)
Output Low Voltage
D080
I/O ports
V
V
IOL = 8.5 mA, VDD = 4.5V (Ind.)
IOH = -3.0 mA, VDD = 4.5V (Ind.)
(5)
VOH
Output High Voltage
D090
I/O ports
VDD – 0.7
—
*
These parameters are characterized but not tested.
†
Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
Note 1: In RC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended to use an external
clock in RC mode.
2: Negative current is defined as current sourced by the pin.
3: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent
normal operating conditions. Higher leakage current may be measured at different input voltages.
4: See Section 13.0 “Data EEPROM and Flash Program Memory Control” for additional information.
5: Including OSC2 in CLKOUT mode.
© 2007 Microchip Technology Inc.
DS41250F-page 261
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