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PIC16F88-I/P 参数 Datasheet PDF下载

PIC16F88-I/P图片预览
型号: PIC16F88-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 18 /20/ 28引脚增强型闪存微控制器采用纳瓦技术 [18/20/28-Pin Enhanced FLASH Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 214 页 / 3543 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F87/88  
8.1  
Timer2 Prescaler and Postscaler  
8.0  
TIMER2 MODULE  
The prescaler and postscaler counters are cleared  
when any of the following occurs:  
Timer2 is an 8-bit timer with a prescaler and a  
postscaler. It can be used as the PWM time base for the  
PWM mode of the CCP1 module. The TMR2 register is  
readable and writable, and is cleared on any device  
RESET.  
• A write to the TMR2 register  
• A write to the T2CON register  
• Any device RESET (Power-on Reset, MCLR,  
WDT Reset, or Brown-out Reset)  
The input clock (FOSC/4) has a prescale option of 1:1,  
1:4  
or  
1:16,  
selected  
by  
control  
bits  
TMR2 is not cleared when T2CON is written.  
T2CKPS1:T2CKPS0 (T2CON<1:0>).  
The Timer2 module has an 8-bit period register, PR2.  
Timer2 increments from 00h until it matches PR2 and  
then resets to 00h on the next increment cycle. PR2 is  
a readable and writable register. The PR2 register is  
initialized to FFh upon RESET.  
8.2  
Output of TMR2  
The output of TMR2 (before the postscaler) is fed to the  
Synchronous Serial Port module, which optionally uses  
it to generate a shift clock.  
The match output of TMR2 goes through a 4-bit  
postscaler (which gives a 1:1 to 1:16 scaling inclusive)  
to generate a TMR2 interrupt (latched in flag bit  
TMR2IF (PIR1<1>)).  
FIGURE 8-1:  
TIMER2 BLOCK DIAGRAM  
Sets Flag  
bit TMR2IF  
TMR2  
Output(1)  
RESET  
Timer2 can be shut-off by clearing control bit TMR2ON  
(T2CON<2>) to minimize power consumption.  
Prescaler  
1:1, 1:4, 1:16  
TMR2 reg  
FOSC/4  
Register 8-1 shows the Timer2 Control register.  
Postscaler  
2
Comparator  
Additional information on timer modules is available in  
the PICmicro® Mid-Range MCU Family Reference  
Manual (DS33023).  
1:1 to 1:16  
EQ  
4
PR2 reg  
Note 1: TMR2 register output can be software selected  
by the SSP module as a baud clock.  
2003 Microchip Technology Inc.  
Preliminary  
DS30487B-page 79