PIC16F882/883/884/886/887
9.2.7
ADC REGISTER DEFINITIONS
The following registers are used to control the opera-
tion of the ADC.
Note:
For ANSEL and ANSELH registers, see
Register 3-3 and Register 3-4, respectively.
REGISTER 9-1:
ADCON0: A/D CONTROL REGISTER 0
R/W-0
ADCS1
bit 7
R/W-0
R/W-0
CHS3
R/W-0
CHS2
R/W-0
CHS1
R/W-0
CHS0
R/W-0
R/W-0
ADON
ADCS0
GO/DONE
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7-6
bit 5-2
ADCS<1:0>: A/D Conversion Clock Select bits
00= FOSC/2
01= FOSC/8
10= FOSC/32
11= FRC (clock derived from a dedicated internal oscillator = 500 kHz max)
CHS<3:0>: Analog Channel Select bits
0000= AN0
0001= AN1
0010= AN2
0011= AN3
0100= AN4
0101= AN5
0110= AN6
0111= AN7
1000= AN8
1001= AN9
1010= AN10
1011= AN11
1100= AN12
1101= AN13
1110= CVREF
1111= Fixed Ref (0.6 volt fixed reference)
bit 1
bit 0
GO/DONE: A/D Conversion Status bit
1= A/D conversion cycle in progress. Setting this bit starts an A/D conversion cycle.
This bit is automatically cleared by hardware when the A/D conversion has completed.
0= A/D conversion completed/not in progress
ADON: ADC Enable bit
1= ADC is enabled
0= ADC is disabled and consumes no operating current
DS41291D-page 104
Preliminary
© 2007 Microchip Technology Inc.