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PIC16F818-I/P 参数 Datasheet PDF下载

PIC16F818-I/P图片预览
型号: PIC16F818-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 二十零分之一十八引脚增强型闪存微控制器采用纳瓦技术 [18/20-Pin Enhanced Flash Microcontrollers with nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 176 页 / 2941 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F818/819  
REGISTER 12-1: CONFIGURATION WORD (ADDRESS 2007h)(1)  
R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1  
CP CCPMX DEBUG WRT1 WRT0 CPD LVP BOREN MCLRE FOSC2 PWRTEN WDTEN FOSC1 FOSC0  
bit 13 bit 0  
R/P-1 R/P-1  
R/P-1  
R/P-1  
R/P-1 R/P-1  
bit 13  
bit 12  
bit 11  
CP: Flash Program Memory Code Protection bit  
1= Code protection off  
0= All memory locations code-protected  
CCPMX: CCP1 Pin Selection bit  
1= CCP1 function on RB2  
0= CCP1 function on RB3  
DEBUG: In-Circuit Debugger Mode bit  
1= In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins  
0= In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger  
bit 10-9  
WRT1:WRT0: Flash Program Memory Write Enable bits  
For PIC16F818:  
11= Write protection off  
10= 000h to 01FF write-protected, 0200 to 03FF may be modified by EECON control  
01= 000h to 03FF write-protected  
For PIC16F819:  
11= Write protection off  
10= 0000h to 01FFh write-protected, 0200h to 07FFh may be modified by EECON control  
01= 0000h to 03FFh write-protected, 0400h to 07FFh may be modified by EECON control  
00= 0000h to 05FFh write-protected, 0600h to 07FFh may be modified by EECON control  
bit 8  
CPD: Data EE Memory Code Protection bit  
1= Code protection off  
0= Data EE memory locations code-protected  
bit 7  
LVP: Low-Voltage Programming Enable bit  
1= RB3/PGM pin has PGM function, Low-Voltage Programming enabled  
0= RB3/PGM pin has digital I/O function, HV on MCLR must be used for programming  
bit 6  
BOREN: Brown-out Reset Enable bit  
1= BOR enabled  
0= BOR disabled  
bit 5  
MCLRE: RA5/MCLR/VPP Pin Function Select bit  
1= RA5/MCLR/VPP pin function is MCLR  
0= RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD  
bit 3  
PWRTEN: Power-up Timer Enable bit  
1= PWRT disabled  
0= PWRT enabled  
bit 2  
WDTEN: Watchdog Timer Enable bit  
1= WDT enabled  
0= WDT disabled  
bit 4, 1-0  
FOSC2:FOSC0: Oscillator Selection bits  
111= EXTRC oscillator; CLKO function on RA6/OSC2/CLKO pin  
110= EXTRC oscillator; port I/O function on RA6/OSC2/CLKO pin  
101= INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on  
RA7/OSC1/CLKI pin  
100= INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin  
011= EXTCLK; port I/O function on RA6/OSC2/CLKO pin  
010= HS oscillator  
001= XT oscillator  
000= LP oscillator  
Note 1: The erased (unprogrammed) value of the Configuration Word is 3FFFh.  
Legend:  
R = Readable bit  
P = Programmable bit  
U = Unimplemented bit, read as ‘1’  
-n = Value when device is unprogrammed  
u = Unchanged from programmed state  
DS39598E-page 90  
2004 Microchip Technology Inc.