PIC16F72X/PIC16LF72X
8.0
DEVICE CONFIGURATION
8.1
Configuration Words
Device Configuration consists of Configuration Word 1
and Configuration Word 2 registers, Code Protection
and Device ID.
There are several Configuration Word bits that allow
different oscillator and memory protection options.
These are implemented as Configuration Word 1
register at 2007h and Configuration Word 2 register at
2008h. These registers are only accessible during
programming.
REGISTER 8-1:
—
bit 15
U-1
(4)
—
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 13
CONFIG1: CONFIGURATION WORD REGISTER 1
R/P-1
—
DEBUG
R/P-1
PLLEN
U-1
(4)
—
R/P-1
BORV
R/P-1
BOREN1
R/P-1
BOREN0
bit 8
R/P-1
CP
R/P-1
MCLRE
R/P-1
PWRTE
R/P-1
WDTE
R/P-1
FOSC2
R/P-1
FOSC1
R/P-1
FOSC0
bit 0
P = Programmable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
DEBUG:
In-Circuit Debugger Mode bit
1
= In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins
0
= In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger
PLLEN:
INTOSC PLL Enable bit
0
= INTOSC Frequency is 500 kHz
1
= INTOSC Frequency is 16 MHz (32x)
Unimplemented:
Read as ‘1’
BORV:
Brown-out Reset Voltage selection bit
0
= Brown-out Reset Voltage (V
BOR
) set to 2.5 V nominal
1
= Brown-out Reset Voltage (V
BOR
) set to 1.9 V nominal
BOREN<1:0>:
Brown-out Reset Selection bits
(1)
0x
= BOR disabled (Preconditioned State)
10
= BOR enabled during operation and disabled in Sleep
11
= BOR enabled
Unimplemented:
Read as ‘1’
CP:
Code Protection bit
(2)
1
= Program memory code protection is disabled
0
= Program memory code protection is enabled
MCLRE:
RE3/MCLR pin function select bit
(3)
1
= RE3/MCLR pin function is MCLR
0
= RE3/MCLR pin function is digital input, MCLR internally tied to V
DD
PWRTE:
Power-up Timer Enable bit
1
= PWRT disabled
0
= PWRT enabled
WDTE:
Watchdog Timer Enable bit
1
= WDT enabled
0
= WDT disabled
Enabling Brown-out Reset does not automatically enable Power-up Timer.
The entire program memory will be erased when the code protection is turned off.
When MCLR is asserted in INTOSC or RC mode, the internal clock oscillator is disabled.
MPLAB
®
IDE masks unimplemented Configuration bits to ‘0’.
bit 12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5
bit 4
bit 3
Note 1:
2:
3:
4:
©
2009 Microchip Technology Inc.
DS41341E-page 95
MICROCHIP [ MICROCHIP TECHNOLOGY ]
