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PIC16F722-I/SS 参数 Datasheet PDF下载

PIC16F722-I/SS图片预览
型号: PIC16F722-I/SS
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚闪存单片机采用纳瓦XLP技术 [28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology]
分类和应用: 闪存微控制器
文件页数/大小: 302 页 / 4540 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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PIC16F72X/PIC16LF72X
21.0
INSTRUCTION SET SUMMARY
TABLE 21-1:
Field
f
W
b
k
x
The PIC16F72X/PIC16LF72X instruction set is highly
orthogonal and is comprised of three basic categories:
Byte-oriented
operations
Bit-oriented
operations
Literal and control
operations
Each PIC16 instruction is a 14-bit word divided into an
opcode,
which specifies the instruction type and one or
more
operands,
which further specify the operation of
the instruction. The formats for each of the categories
is presented in Figure 21-1, while the various opcode
fields are summarized in Table 21-1.
MPASM
TM
assembler.
For
byte-oriented
instructions, ‘f’ represents a file
register designator and ‘d’ represents a destination
designator. The file register designator specifies which
file register is to be used by the instruction.
The destination designator specifies where the result of
the operation is to be placed. If ‘d’ is zero, the result is
placed in the W register. If ‘d’ is one, the result is placed
in the file register specified in the instruction.
For
bit-oriented
instructions, ‘b’ represents a bit field
designator, which selects the bit affected by the
operation, while ‘f’ represents the address of the file in
which the bit is located.
For
literal and control
operations, ‘k’ represents an
8-bit or 11-bit constant, or literal value.
One instruction cycle consists of four oscillator periods;
for an oscillator frequency of 4 MHz, this gives a
nominal instruction execution time of 1
μs.
All
instructions are executed within a single instruction
cycle, unless a conditional test is true, or the program
counter is changed as a result of an instruction. When
this occurs, the execution takes two instruction cycles,
with the second cycle executed as a
NOP.
All instruction examples use the format ‘0xhh’ to
represent a hexadecimal number, where ‘h’ signifies a
hexadecimal digit.
OPCODE FIELD
DESCRIPTIONS
Description
Register file address (0x00 to 0x7F)
Working register (accumulator)
Bit address within an 8-bit file register
Literal field, constant data or label
Don’t care location (=
0
or
1).
The assembler will generate code with x =
0.
It is the recommended form of use for
compatibility with all Microchip software tools.
Destination select; d =
0:
store result in
W
,
d =
1:
store result in file register f.
Default is d =
1.
Program Counter
Time-out bit
Carry bit
Digit carry bit
Zero bit
Power-down bit
d
PC
TO
C
DC
Z
PD
FIGURE 21-1:
GENERAL FORMAT FOR
INSTRUCTIONS
0
Byte-oriented file register operations
13
8 7 6
OPCODE
d
f (FILE #)
d =
0
for destination W
d =
1
for destination f
f = 7-bit file register address
Bit-oriented file register operations
13
10 9
7 6
OPCODE
b (BIT #)
f (FILE #)
b = 3-bit bit address
f = 7-bit file register address
Literal and control operations
General
13
OPCODE
8
7
k (literal)
0
21.1
Read-Modify-Write Operations
0
Any instruction that specifies a file register as part of
the instruction performs a Read-Modify-Write (R-M-W)
operation. The register is read, the data is modified,
and the result is stored according to either the instruc-
tion, or the destination designator ‘d’. A read operation
is performed on a register even if the instruction writes
to that register.
For example, a
CLRF PORTB
instruction will read
PORTB, clear all the data bits, then write the result
back to PORTB. This example would have the unin-
tended consequence of clearing the condition that set
the RBIF flag.
k = 8-bit immediate value
CALL
and
GOTO
instructions only
13
11
OPCODE
10
k (literal)
0
k = 11-bit immediate value
©
2009 Microchip Technology Inc.
DS41341E-page 197