PIC16F688
FIGURE 14-8:
USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
RC4/C2OUT/TX/CK
pin
121
121
RC5/RX/DT
pin
120
Refer to Figure 14-2 for load conditions.
122
Note:
TABLE 14-6: USART SYNCHRONOUS TRANSMISSION REQUIREMENTS
Standard Operating Conditions (unless otherwise stated)
Operating Temperature-40°C ≤ TA ≤ +125°C
Param.
No.
Symbol
Characteristic
Min
Max
Units Conditions
120 TckH2dtV SYNC XMIT (Master & Slave)
Clock high to data-out valid
PIC16F688
PIC16LF688
PIC16F688
PIC16LF688
PIC16F688
PIC16LF688
—
—
—
—
—
—
40
100
20
ns
ns
ns
ns
ns
ns
121 Tckrf
122 Tdtrf
Clock out rise time and fall time
(Master mode)
50
Data-out rise time and fall time
20
50
FIGURE 14-9:
USART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
RC4/C2OUT/TX/CK
pin
125
RC5/RX/DT
pin
126
Note: Refer to Figure 14-2 for load conditions.
TABLE 14-7: USART SYNCHRONOUS RECEIVE REQUIREMENTS
Standard Operating Conditions (unless otherwise stated)
Operating Temperature-40°C ≤ TA ≤ +125°C
Param.
No.
Symbol
Characteristic
Min
Max
Units
Conditions
125
TdtV2ckl SYNC RCV (Master & Slave)
Data-hold before CK ↓ (DT hold time)
10
15
—
—
ns
ns
126
TckL2dtl
Data-hold after CK ↓ (DT hold time)
2004 Microchip Technology Inc.
Preliminary
DS41203B-page 151