PIC16F631/677/685/687/689/690
TABLE 14-4: INITIALIZATION CONDITION FOR REGISTER
Wake-up from Sleep
through Interrupt
Wake-up from Sleep
through WDT Time-out
MCLR Reset
WDT Reset
Brown-out Reset
Register
Address
Power-on Reset
(1)
W
—
xxxx xxxx
xxxx xxxx
uuuu uuuu
xxxx xxxx
uuuu uuuu
uuuu uuuu
INDF
00h/80h/
100h/180h
TMR0
PCL
01h/101h
xxxx xxxx
0000 0000
uuuu uuuu
0000 0000
uuuu uuuu
(3)
02h/82h/
PC + 1
102h/182h
(4)
(4)
STATUS
FSR
03h/83h/
103h/183h
0001 1xxx
xxxx xxxx
000q quuu
uuuq quuu
04h/84h/
uuuu uuuu
uuuu uuuu
104h184h
PORTA
PORTB
PORTC
PCLATH
05h/105h
06h/106h
07h/107h
--xx xxxx
xxxx ----
xxxx xxxx
---0 0000
--uu uuuu
uuuu ----
uuuu uuuu
---0 0000
--uu uuuu
uuuu ----
uuuu uuuu
---u uuuu
0Ah/8Ah/
10Ah/18Ah
(2)
INTCON
0Bh/8Bh/
0000 000x
0000 000u
uuuu uuuu
10Bh/18Bh
(2)
PIR1
0Ch
0Dh
0Eh
-000 0000
0000 ----
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
-000 0000
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 000x
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
0000 0000
1111 1111
--11 1111
-000 0000
0000 ----
uuuu uuuu
uuuu uuuu
uuuu uuuu
0000 0000
-000 0000
uuuu uuuu
0000 0000
uuuu uuuu
uuuu uuuu
0000 0000
0000 000x
0000 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
0000 0000
1111 1111
--11 1111
-uuu uuuu
(2)
PIR2
uuuu ----
TMR1L
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
TMR1H
T1CON
0Fh
10h
TMR2
11h
T2CON
12h
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
RCSTA
13h
14h
15h
16h
17h
18h
TXREG
RCREG
PWM1CON
ECCPAS
ADRESH
ADCON0
OPTION_REG
TRISA
19h
1Ah
1Ch
1Dh
1Eh
1Fh
81h/181h
85h/185h
Legend: u= unchanged, x= unknown, —= unimplemented bit, reads as ‘0’, q= value depends on condition.
Note 1: If VDD goes too low, Power-on Reset will be activated and registers will be affected differently.
2: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h).
4: See Table 14-5 for Reset value for specific condition.
5: If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.
6: Accessible only when SSPM<3:0> = 1001.
© 2007 Microchip Technology Inc.
DS41262D-page 201