PIC16F631/677/685/687/689/690
FIGURE 17-19:
A/D CONVERSION TIMING (SLEEP MODE)
BSF ADCON0, GO
134
(1)
1 TCY
(TOSC/2 + TCY)
131
Q4
130
A/D CLK
A/D Data
9
8
7
3
2
1
0
6
NEW_DATA
1 TCY
OLD_DATA
ADRES
ADIF
GO
DONE
Sampling Stopped
132
Sample
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the
SLEEPinstruction to be executed.
TABLE 17-17: A/D CONVERSION REQUIREMENTS (SLEEP MODE)
Standard Operating Conditions (unless otherwise stated)
Operating Temperature
-40°C ≤ TA ≤ +125°C
Param
No.
Sym
Characteristic
A/D Internal RC
Min
Typ†
Max Units
Conditions
130
TAD
ADCS<1:0> = 11(RC mode)
Oscillator Period
3.0*
2.0*
—
6.0
4.0
11
9.0*
6.0*
—
μs At VDD = 2.5V
μs At VDD = 5.0V
131
132
TCNV
TACQ
Conversion Time
(not including
TAD
Acquisition Time)(1)
(2)
Acquisition Time
11.5
—
—
—
μs
5*
μs The minimum time is the amplifier
settling time. This may be used if
the “new” input voltage has not
changed by more than 1 LSb (i.e.,
4.1 mV @ 4.096V) from the last
sampled voltage (as stored on
CHOLD).
134
TGO
Q4 to A/D Clock
Start
—
TOSC/2 + TCY
—
—
If the A/D clock source is selected
as RC, a time of TCY is added
before the A/D clock starts. This
allows the SLEEPinstruction to be
executed.
*
These parameters are characterized but not tested.
†
Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: ADRES register may be read on the following TCY cycle.
2: See Table 9-1 for minimum conditions.
DS41262D-page 254
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
