PIC16F631/677/685/687/689/690
6.0
TIMER1 MODULE WITH GATE
CONTROL
6.1
Timer1 Operation
The Timer1 module is a 16-bit incrementing counter
which is accessed through the TMR1H:TMR1L register
pair. Writes to TMR1H or TMR1L directly update the
counter.
When used with an internal clock source, the module is
a timer. When used with an external clock source, the
module can be used as either a timer or counter.
The Timer1 module is a 16-bit timer/counter with the
following features:
•
•
•
•
•
•
•
•
•
•
•
16-bit timer/counter register pair (TMR1H:TMR1L)
Programmable internal or external clock source
3-bit prescaler
Optional LP oscillator
Synchronous or asynchronous operation
Timer1 gate (count enable) via comparator or
T1G pin
Interrupt on overflow
Wake-up on overflow (external clock,
Asynchronous mode only)
Time base for the Capture/Compare function
(PIC16F685/PIC16F690 only)
Special Event Trigger (with ECCP)
(PIC16F685/PIC16F690 only)
Comparator output synchronization to Timer1
clock
6.2
Clock Source Selection
The TMR1CS bit of the T1CON register is used to select
the clock source. When TMR1CS =
0,
the clock source
is F
OSC
/4. When TMR1CS =
1,
the clock source is
supplied externally.
Clock
Source
F
OSC
/4
T1CKI pin
T1LPOSC
T1OSCEN
x
0
1
FOSC
Mode
xxx
xxx
LP or
INTOSCIO
TMR1CS
0
1
1
FIGURE 6-1:
TIMER1 BLOCK DIAGRAM
TMR1GE
TMR1ON
Set flag bit
TMR1IF on
Overflow
To C2 Comparator module
Timer1 Clock
EN
0
Synchronized
clock input
T1GINV
TMR1
(1)
TMR1H
TMR1L
1
Oscillator
OSC1/T1CKI
*
1
F
OSC
/4
Internal
Clock
T1SYNC
Prescaler
1, 2, 4, 8
0
2
T1CKPS<1:0>
TMR1CS
1
Synchronize
det
(2)
OSC2/T1G
T1OSCEN
F
OSC
=
100
F
OSC
=
000
T1GSS
Sleep
SYNCC2OUT
0
*
Note 1:
2:
ST Buffer is low power type when using LP osc, or high speed type when using T1CKI.
Timer1 register increments on rising edge.
Synchronize does not operate while in Sleep.
DS41262D-page 84
©
2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
