PIC16F631/677/685/687/689/690
4.0
I/O PORTS
There are as many as eighteen general purpose I/O
pins available. Depending on which peripherals are
enabled, some or all of the pins may not be available as
general purpose I/O. In general, when a peripheral is
enabled, the associated pin may not be used as a
general purpose I/O pin.
port pins are read, this value is modified and then
written to the PORT data latch. RA3 reads ‘0’ when
MCLRE =
1.
The TRISA register controls the PORTA pin output
drivers, even when they are being used as analog
inputs. The user should ensure the bits in the TRISA
register are maintained set when using them as analog
inputs. I/O pins configured as analog input always read
‘0’.
Note:
The ANSEL register must be initialized to
configure an analog channel as a digital
input. Pins configured as analog inputs will
read ‘0’.
4.1
PORTA and the TRISA Registers
PORTA is a 6-bit wide, bidirectional port. The
corresponding data direction register is TRISA
1)
will make the
corresponding PORTA pin an input (i.e., disable the
output driver). Clearing a TRISA bit (=
0)
will make the
corresponding PORTA pin an output (i.e., enables
output driver and puts the contents of the output latch
on the selected pin). The exception is RA3, which is
input only and its TRIS bit will always read as ‘1’.
Reading the PORTA register (Register 4-1) reads the
status of the pins, whereas writing to it will write to the
PORT latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
EXAMPLE 4-1:
BCF
BCF
CLRF
BSF
CLRF
BSF
BCF
MOVLW
MOVWF
BCF
STATUS,RP0
STATUS,RP1
PORTA
STATUS,RP1
ANSEL
STATUS,RP0
STATUS,RP1
0Ch
TRISA
STATUS,RP0
INITIALIZING PORTA
;Bank 0
;
;Init PORTA
;Bank 2
;digital I/O
;Bank 1
;
;Set RA<3:2> as inputs
;and set RA<5:4,1:0>
;as outputs
;Bank 0
REGISTER 4-1:
U-0
—
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
PORTA: PORTA REGISTER
U-0
—
R/W-x
RA5
R/W-x
RA4
R-x
RA3
R/W-x
RA2
R/W-x
RA1
R/W-x
RA0
bit 0
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
Unimplemented:
Read as ‘0’
RA<5:0>:
PORTA I/O Pin bit
1
= Port pin is > V
IH
0
= Port pin is < V
IL
REGISTER 4-2:
U-0
—
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
TRISA: PORTA TRI-STATE REGISTER
U-0
—
R/W-1
TRISA5
R/W-1
TRISA4
R-1
TRISA3
R/W-1
TRISA2
R/W-1
TRISA1
R/W-1
TRISA0
bit 0
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
Unimplemented:
Read as ‘0’
TRISA<5:0>:
PORTA Tri-State Control bit
1
= PORTA pin configured as an input (tri-stated)
0
= PORTA pin configured as an output
TRISA<3> always reads ‘1’.
TRISA<5:4> always reads ‘1’ in XT, HS and LP Oscillator modes.
Note 1:
2:
©
2007 Microchip Technology Inc.
DS41262D-page 59
MICROCHIP [ MICROCHIP TECHNOLOGY ]
