PIC16F630/676
TABLE 2-2:
PIC16F630/676 SPECIAL FUNCTION REGISTERS SUMMARY BANK 1
Value on
POR,
Addr
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page
BOD
Bank 1
80h
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
xxxx xxxx
1111 1111
18,61
12,30
81h
OPTION_REG
RAPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
82h
83h
PCL
Program Counter's (PC) Least Significant Byte
0000 0000
0001 1xxx
17
11
IRP(2)
RP1(2)
RP0
TO
PD
Z
DC
C
STATUS
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
FSR
Indirect data memory address pointer
xxxx xxxx
--11 1111
—
18
19
—
TRISA
—
—
—
—
TRISA5
TRISC5
TRISA4
TRISC4
TRISA3
TRISC3
TRISA2
TRISC2
TRISA1
TRISC1
TRISA0
TRISC0
Unimplemented
—
TRISC
—
--11 1111
—
—
Unimplemented
Unimplemented
—
—
—
—
—
PCLATH
INTCON
PIE1
—
—
—
T0IE
—
Write buffer for upper 5 bits of program counter
---0 0000
0000 0000
00-- 0--0
—
17
13
14
—
GIE
PEIE
ADIE
INTE
—
RAIE
CMIE
T0IF
—
INTF
—
RAIF
EEIE
TMR1IE
Unimplemented
PCON
---- --qq
16
—
—
—
—
—
—
POR
BOD
8Fh
90h
—
—
OSCCAL
CAL5
ANS7
CAL4
ANS6
CAL3
ANS5
CAL2
ANS4
CAL1
ANS3
CAL0
ANS2
1000 00--
16
—
—
91h
92h
93h
94h
95h
ANSEL(3)
ANS1
ANS0
1111 1111
46
—
—
—
Unimplemented
Unimplemented
Unimplemented
—
—
—
—
—
—
—
WPUA
—
—
—
--11 -111
20
WPUA5
IOCA5
WPUA4
IOCA4
WPUA2
IOCA2
WPUA1
IOCA1
WPUA0
IOCA0
96h
IOCA
—
IOCA3
--00 0000
—
21
—
97h
—
Unimplemented
Unimplemented
VREN
98h
—
—
—
99h
VRCON
EEDAT
EEADR
EECON1
EECON2
ADRESL(3)
ADCON1(3)
—
VRR
—
—
VR3
VR2
VR1
WR
VR0
RD
—
0-0- 0000
0000 0000
0000 0000
---- x000
---- ----
xxxx xxxx
-000 ----
42
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
EEPROM data register
49
—
—
EEPROM address register
49
—
—
WRERR
WREN
50
EEPROM control register 2 (not a physical register)
Least Significant 2 bits of the left shifted result or 8 bits of the right shifted result
ADCS2 ADCS1 ADCS0
49
44
—
—
—
—
45,61
Legend:
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
Note 1: Other (non Power-up) Resets include MCLR Reset, Brown-out Detect and Watchdog Timer Reset during normal operation.
2: IRP & RP1 bits are reserved, always maintain these bits clear.
3: PIC16F676 only.
DS40039E-page 10
© 2007 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
