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PIC16F630-I/ST 参数 Datasheet PDF下载

PIC16F630-I/ST图片预览
型号: PIC16F630-I/ST
PDF下载: 下载PDF文件 查看货源
内容描述: 14引脚基于闪存的8位CMOS微控制器 [14-Pin FLASH-Based 8-Bit CMOS Microcontrollers]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 130 页 / 1924 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F630/676  
TABLE 2-1:  
PIC16F630/676 SPECIAL REGISTERS SUMMARY BANK 0  
Value on  
POR,  
Addr  
Name  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Page  
BOD  
Bank 0  
00h  
INDF  
Addressing this location uses contents of FSR to address data memory (not a physical register)  
Timer0 Module’s Register  
xxxx xxxx  
xxxx xxxx  
0000 0000  
0001 1xxx  
18,61  
29  
01h  
TMR0  
PCL  
02h  
Program Counter's (PC) Least Significant Byte  
17  
IRP(2)  
Indirect data memory address pointer  
RP1(2)  
RP0  
TO  
PD  
Z
DC  
C
03h  
STATUS  
11  
04h  
05h  
FSR  
xxxx xxxx  
--xx xxxx  
18  
19  
PORTA  
I/O Control Registers  
I/O Control Registers  
06h  
07h  
Unimplemented  
PORTC  
--xx xxxx  
26  
08h  
09h  
0Ah  
0Bh  
0Ch  
0Dh  
0Eh  
0Fh  
Unimplemented  
Unimplemented  
PCLATH  
INTCON  
PIR1  
T0IE  
Write buffer for upper 5 bits of program counter  
---0 0000  
0000 0000  
00-- 0--0  
17  
13  
15  
GIE  
PEIE  
ADIF  
INTE  
RAIE  
CMIF  
T0IF  
INTF  
RAIF  
EEIF  
TMR1IF  
Unimplemented  
TMR1L  
TMR1H  
Holding register for the Least Significant Byte of the 16-bit TMR1  
Holding register for the Most Significant Byte of the 16-bit TMR1  
xxxx xxxx  
xxxx xxxx  
-000 0000  
32  
32  
34  
10h  
11h  
12h  
13h  
14h  
15h  
16h  
17h  
18h  
19h  
1Ah  
1Bh  
1Ch  
1Dh  
1Eh  
T1CON  
T1GE  
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC  
TMR1CS  
TMR1ON  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
CMCON  
COUT  
CINV  
CIS  
CM2  
CM1  
CM0  
-0-0 0000  
37  
Unimplemented  
Unimplemented  
Unimplemented  
Unimplemented  
ADRESH(3) Most Significant 8 bits of the left shifted A/D result or 2 bits of right shifted result  
xxxx xxxx  
00-0 0000  
44  
ADCON0(3)  
ADFM VCFG CHS2 CHS1 CHS0 GO/DONE  
ADON  
45,61  
1Fh  
Legend:  
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition shaded = unimplemented  
Note 1: Other (non Power-up) Resets include MCLR Reset, Brown-out Detect and Watchdog Timer Reset during normal operation.  
2: IRP & RP1 bits are reserved, always maintain these bits clear.  
3: PIC16F676 only.  
© 2007 Microchip Technology Inc.  
DS40039E-page 9  
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