PIC16F5X
5.0
RESET
The PIC16F5X devices may be reset in one of the
following ways:
•
•
•
•
•
Power-on Reset (POR)
MCLR Reset (normal operation)
MCLR Wake-up Reset (from Sleep)
WDT Reset (normal operation)
WDT Wake-up Reset (from Sleep)
The TO and PD bits (STATUS <4:3>) are set or cleared
depending on the different Reset conditions (Table 5-1).
These bits may be used to determine the nature of the
Reset.
registers. Figure 5-1 shows a simplified block diagram
of the on-chip Reset circuit.
and STATUS registers.
Some registers are not affected in any Reset condition.
Their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on Power-on Reset (POR), MCLR or WDT
Reset. A MCLR or WDT wake-up from Sleep also
results in a device Reset and not a continuation of
operation before Sleep.
TABLE 5-1:
Power-on Reset
STATUS BITS AND THEIR SIGNIFICANCE
Condition
TO
1
u
1
0
0
PD
1
u
0
1
0
MCLR Reset (normal operation)
MCLR Wake-up (from Sleep)
WDT Reset (normal operation)
WDT Wake-up (from Sleep)
Legend:
u
= unchanged,
x
= unknown, — = unimplemented read as ‘0’.
TABLE 5-2:
Address
03h
SUMMARY OF REGISTERS ASSOCIATED WITH RESET
Name
Bit 7
PA2
Bit 6
PA1
Bit 5
PA0
Bit 4
TO
Bit 3
PD
Bit 2
Z
Bit 1
DC
Bit 0
C
Value on
POR
Value on
MCLR and
WDT Reset
STATUS
0001 1xxx 000q quuu
Legend:
u
= unchanged,
x
= unknown,
q
= see Table 5-1 for possible values.
©
2007 Microchip Technology Inc.
DS41213D-page 23