PIC12F510/16F506
FIGURE 3-2:
PIC16F506 SERIES BLOCK DIAGRAM
10
Program Counter
Flash
1K x 12
Program
Memory
8
Data Bus
PORTB
RB0/ICSPDAT
RB1/ICSPCLK
RB2
RB3
RB4
RB5
PORTC
STACK 1
STACK 2
Program
Bus
RAM
67 bytes
File
Registers
RAM Addr
9
10
Instruction Reg
Direct Addr
5
Addr MUX
5-7
Indirect
Addr
RC0
RC1
RC2
RC3
RC4
RC5
C1IN+
C1IN-
C1OUT
FSR Reg
STATUS Reg
8
3
Device Reset
Timer
Instruction
Decode &
Control
Timing
Generation
Power-on
Reset
Watchdog
Timer
Internal RC
Clock
8
W Reg
ALU
Comparator 2
Comparator 1
MUX
0.6V Reference
C2IN+
C2IN-
C2OUT
CV
REF
CV
REF
CV
REF
OSC1/CLKIN
OSC2/CLKOUT
Timer0
AN0
MCLR
V
DD
, V
SS
8-bit ADC
AN1
AN2
T0CKI
DS41268C-page 12
Preliminary
©
2007 Microchip Technology Inc.