PIC12F510/16F506
FIGURE 3-1:
PIC12F510 SERIES BLOCK DIAGRAM
10-11
Flash
Program Counter
8
GPIO
GP0/ICSPDAT
GP1/ICSPCLK
GP2
GP3
GP4
GP5
Data Bus
1K x 12
Program
Memory
Program
Bus
12
Instruction Reg
Direct Addr
5
STACK 1
STACK 2
RAM
38 bytes
File
Registers
RAM Addr
9
Addr MUX
5-7
Indirect
Addr
FSR Reg
STATUS Reg
8
3
Device Reset
Timer
Instruction
Decode &
Control
Timing
Generation
Power-on
Reset
Watchdog
Timer
Internal RC
Clock
8
W Reg
CV
REF
ALU
MUX
C1IN+
C1IN-
C1OUT
Comparator
OSC1/CLKIN
OSC2
Timer0
MCLR
V
DD
, V
SS
8-bit ADC
AN0
AN1
AN2
T0CKI
DS41268C-page 10
Preliminary
©
2007 Microchip Technology Inc.