PIC12F508/509/16F505
TABLE 10-5: TIMING REQUIREMENTS – PIC12F508/509/16F505
Standard Operating Conditions (unless otherwise specified)
AC
Operating Temperature -40°C ≤ TA ≤ +85°C (industrial)
-40°C ≤ TA ≤ +125°C (extended)
CHARACTERISTICS
Operating Voltage VDD range is described in Section 10.1 "DC Characteristics"
Param
Sym
No.
Characteristic
Min
Typ(1)
Max
Units
17
18
19
20
21
TOSH2IOV OSC1↑ (Q1 cycle) to Port Out Valid(2), (3)
TOSH2IOI
TIOV2OSH Port Input Valid to OSC1↑ (I/O in setup time)
—
—
—
—
10
10
100*
—
ns
ns
ns
ns
ns
OSC1↑ (Q2 cycle) to Port Input Invalid (I/O in hold time)(2) TBD
TBD
—
TIOR
TIOF
Port Output Rise Time(3)
Port Output Fall Time(3)
—
25**
25**
—
Legend: TBD = To Be Determined.
*
These parameters are characterized but not tested.
** These parameters are design targets and are not tested.
Note 1: Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated. These parameters are for design
guidance only and are not tested.
2: Measurements are taken in EXTRC mode.
3: See Figure 10-3 for loading conditions.
FIGURE 10-6:
RESET, WATCHDOG TIMER AND DEVICE RESET TIMER TIMING –
PIC12F508/509/16F505
VDD
MCLR
30
Internal
POR
32
32
32
DRT
(2)
Timeout
Internal
Reset
Watchdog
Timer
Reset
31
34
34
(1)
I/O pin
Note 1: I/O pins must be taken out of High-Impedance mode by enabling the output drivers in software.
2: Runs in MCLR or WDT Reset only in XT, LP and HS (PIC16F505) modes.
DS41236C-page 76
Preliminary
© 2007 Microchip Technology Inc.
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