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PIC16F505-I/SL 参数 Datasheet PDF下载

PIC16F505-I/SL图片预览
型号: PIC16F505-I/SL
PDF下载: 下载PDF文件 查看货源
内容描述: 8月14日引脚, 8位闪存微控制器 [8/14-Pin, 8-Bit Flash Microcontrollers]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 100 页 / 1278 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC12F508/509/16F505  
EXAMPLE 4-1:  
HOW TO CLEAR RAM  
USING INDIRECT  
ADDRESSING  
4.9  
Indirect Data Addressing: INDF  
and FSR Registers  
The INDF register is not  
a physical register.  
MOVLW  
MOVWF  
0x10  
;initialize pointer  
;to RAM  
Addressing INDF actually addresses the register  
whose address is contained in the FSR register (FSR  
is a pointer). This is indirect addressing.  
FSR  
NEXT  
CLRF  
INDF  
;clear INDF  
;register  
INCF  
BTFSC  
GOTO  
FSR,F  
FSR,4  
NEXT  
;inc pointer  
;all done?  
;NO, clear next  
4.9.1  
INDIRECT ADDRESSING  
• Register file 07 contains the value 10h  
• Register file 08 contains the value 0Ah  
• Load the value 07 into the FSR register  
CONTINUE  
:
:
;YES, continue  
• A read of the INDF register will return the value  
of 10h  
The FSR is a 5-bit wide register. It is used in conjunction  
with the INDF register to indirectly address the data  
memory area.  
• Increment the value of the FSR register by one  
(FSR = 08)  
• A read of the INDR register now will return the  
value of 0Ah.  
The FSR<4:0> bits are used to select data memory  
addresses 00h to 1Fh.  
Reading INDF itself indirectly (FSR = 0) will produce  
00h. Writing to the INDF register indirectly results in a  
no operation (although Status bits may be affected).  
PIC12F508 – Does not use banking. FSR <7:5> are  
unimplemented and read as ‘1’s.  
PIC12F509 – Uses FSR<5>. Selects between bank 0  
and bank 1. FSR<7:6> is unimplemented, read as ‘1’.  
A simple program to clear RAM locations 10h-1Fh  
using indirect addressing is shown in Example 4-1.  
PIC16F505 – Uses FSR<6:5>. Selects from bank 0 to  
bank 3. FSR<7> is unimplemented, read as ‘1’.  
FIGURE 4-7:  
DIRECT/INDIRECT ADDRESSING (PIC12F508/509)  
Direct Addressing  
Indirect Addressing  
(FSR)  
4
(opcode)  
0
5
(FSR)  
0
6
4
5
6
Location Select  
Bank Select  
Location Select  
Bank  
00  
01  
00h  
Addresses  
map back to  
addresses  
in Bank 0.  
Data  
Memory  
0Fh  
10h  
(1)  
1Fh  
Bank 0  
3Fh  
Bank 1  
(2)  
Note 1: For register map detail, see Section 4.3 “Data Memory Organization”.  
2: PIC12F509.  
DS41236C-page 26  
Preliminary  
© 2007 Microchip Technology Inc.  
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