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PIC16F870-I/SS 参数 Datasheet PDF下载

PIC16F870-I/SS图片预览
型号: PIC16F870-I/SS
PDF下载: 下载PDF文件 查看货源
内容描述: 40分之28引脚8位CMOS闪存微控制器 [28/40-Pin 8-Bit CMOS FLASH Microcontrollers]
分类和应用: 闪存微控制器和处理器外围集成电路装置光电二极管PC时钟
文件页数/大小: 156 页 / 2816 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F870/871  
10.4.1 A/D RESULT REGISTERS  
SLEEP. If the A/D interrupt is not enabled, the A/D mod-  
ule will then be turned off, although the ADON bit will  
remain set.  
The ADRESH:ADRESL register pair is the location  
where the 10-bit A/D result is loaded at the completion  
of the A/D conversion. This register pair is 16-bits  
wide. The A/D module gives the flexibility to left or right  
justify the 10-bit result in the 16-bit result register. The  
A/D Format Select bit (ADFM) controls this justifica-  
tion. Figure 10-4 shows the operation of the A/D result  
justification. The extra bits are loaded with ’0’s’. When  
an A/D result will not overwrite these locations (A/D  
disable), these registers may be used as two general  
purpose 8-bit registers.  
When the A/D clock source is another clock option (not  
RC), a SLEEPinstruction will cause the present conver-  
sion to be aborted and the A/D module to be turned off,  
though the ADON bit will remain set.  
Turning off the A/D places the A/D module in its lowest  
current consumption state.  
Note: For the A/D module to operate in SLEEP,  
the A/D clock source must be set to RC  
(ADCS1:ADCS0 = 11). To allow the con-  
version to occur during SLEEP, ensure the  
SLEEPinstruction immediately follows the  
instruction that sets the GO/DONE bit.  
10.5  
A/D Operation During Sleep  
The A/D module can operate during SLEEP mode. This  
requires that the A/D clock source be set to RC  
(ADCS1:ADCS0 = 11). When the RC clock source is  
selected, the A/D module waits one instruction cycle  
before starting the conversion. This allows the SLEEP  
instruction to be executed, which eliminates all digital  
switching noise from the conversion. When the conver-  
sion is completed the GO/DONE bit will be cleared and  
the result loaded into the ADRES register. If the A/D  
interrupt is enabled, the device will wake-up from  
10.6  
Effects of a Reset  
A device reset forces all registers to their reset state.  
This forces the A/D module to be turned off, and any  
conversion is aborted.  
The value that is in the ADRESH:ADRESL registers is  
not modified for  
a
Power-on Reset. The  
ADRESH:ADRESL registers will contain unknown data  
after a Power-on Reset.  
FIGURE 10-4: A/D RESULT JUSTIFICATION  
10-Bit Result  
ADFM = 0  
ADFM = 1  
0
7
7
2 1 0 7  
0 7 6 5  
0
0000 00  
0000 00  
ADRESH  
ADRESL  
ADRESH  
ADRESL  
10-bit Result  
10-bit Result  
Left Justified  
Right Justified  
DS30569A-page 86  
Preliminary  
1999 Microchip Technology Inc.