PIC16F870/871
required before the next acquisition is started. After
this 2TAD wait, acquisition on the selected channel is
automatically started.
10.4
A/D Conversions
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D result register
pair will NOT be updated with the partially completed
In Figure 10-3, after the GO bit is set, the first time seg-
mant has a minimum of TCY and a maximum of TAD.
A/D
conversion
sample.
That
is,
the
ADRESH:ADRESL registers will continue to contain
the value of the last completed conversion (or the last
value written to the ADRESH:ADRESL registers).
After the A/D conversion is aborted, a 2TAD wait is
Note: The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
FIGURE 10-3: A/D CONVERSION TAD CYCLES
TCY to TAD
TAD1
TAD3
b8
TAD5 TAD6 TAD7 TAD8 TAD9 TAD10 TAD11
b6 b5 b4 b3 b2 b1 b0
TAD2
b9
TAD4
b7
Conversion Starts
Holding capacitor is disconnected from analog input (typically 100 ns)
Set GO bit
ADRES is loaded,
GO bit is cleared,
ADIF bit is set,
holding capacitor is connected to analog input.
1999 Microchip Technology Inc.
Preliminary
DS30569A-page 85
MICROCHIP [ MICROCHIP ]
