PIC16F7X7
4.7.4
EXITING SLEEP WITH AN
INTERRUPT
If SCS<1:0> =
01
or
10:
1.
2.
The device is held in Sleep until the CPU start-up
time-out is complete.
After the CPU start-up timer has timed out, the
device will exit Sleep and begin instruction
execution with the selected oscillator mode.
Note:
If a user changes SCS<1:0> just before
entering Sleep mode, the system clock
used when exiting Sleep mode could be
different than the system clock used when
entering Sleep mode.
As an example, if SCS<1:0> =
01,
T1OSC
is the system clock and the following
instructions are executed:
BCF
SLEEP
OSCCON,SCS0
Any interrupt, such as WDT or INT0, will cause the part
to leave the Sleep mode.
The SCS bits are unaffected by a
SLEEP
command and
are the same before and after entering and leaving
Sleep. The clock source used after an exit from Sleep
is determined by the SCS bits.
4.7.4.1
1.
2.
Sequence of Events
If SCS<1:0> =
00:
The device is held in Sleep until the CPU start-up
time-out is complete.
If the primary system clock is configured as an
external oscillator (HS, XT, LP), then the OST will
be active waiting for 1024 clocks of the primary
system clock. While waiting for the OST, the
device will be held in Sleep unless Two-Speed
Start-up is enabled. The OST and CPU start-up
timers run in parallel. Refer to
for details
on Two-Speed Start-up.
After both the CPU start-up timer and the
Oscillator Start-up Timer have timed out, the
device will exit Sleep and begin instruction
execution with the primary clock defined by the
FOSC bits.
then a clock change event is executed. If
the primary oscillator is XT, LP or HS, the
core will continue to run off T1OSC and
execute the
SLEEP
command.
When Sleep is exited, the part will resume
operation with the primary oscillator after
the OST has expired.
3.
DS30498C-page 48
2004 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
