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PIC16C57C-04I/SO 参数 Datasheet PDF下载

PIC16C57C-04I/SO图片预览
型号: PIC16C57C-04I/SO
PDF下载: 下载PDF文件 查看货源
内容描述: 基于ROM的8位CMOS微控制器系列 [ROM-Based 8-Bit CMOS Microcontroller Series]
分类和应用: 微控制器和处理器外围集成电路光电二极管PC可编程只读存储器时钟
文件页数/大小: 84 页 / 641 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16CR54C  
following instruction sequence (Example 6-1) must be  
executed when changing the prescaler assignment from  
Timer0 to the WDT.  
6.2  
Prescaler  
An 8-bit counter is available as a prescaler for the  
Timer0 module, or as a postscaler for the Watchdog  
Timer (WDT) (WDT postscaler not implemented on  
PIC16C52), respectively (Section 6.1.2). For simplicity,  
this counter is being referred to as “prescaler”  
throughout this data sheet. Note that the prescaler  
may be used by either the Timer0 module or the WDT,  
but not both. Thus, a prescaler assignment for the  
Timer0 module means that there is no prescaler for  
the WDT, and vice-versa.  
EXAMPLE 6-1: CHANGING PRESCALER  
(TIMER0WDT)  
1.CLRWDT  
2.CLRF  
;Clear WDT  
TMR0  
;Clear TMR0 & Prescaler  
3.MOVLW '00xx1111’b ;These 3 lines (5, 6, 7)  
4.OPTION  
; are required only if  
; desired  
5.CLRWDT  
;PS<2:0> are 000 or 001  
6.MOVLW '00xx1xxx’b ;Set Postscaler to  
7.OPTION ; desired WDT rate  
The PSA and PS2:PS0 bits (OPTION<3:0>) determine  
prescaler assignment and prescale ratio.  
To change prescaler from the WDT to the Timer0  
module, use the sequence shown in Example 6-2. This  
sequence must be used even if the WDT is disabled. A  
CLRWDTinstruction should be executed before switching  
the prescaler.  
When assigned to the Timer0 module, all instructions  
writing to the TMR0 register (e.g., CLRF 1, MOVWF 1,  
BSF 1,x,etc.) will clear the prescaler. When assigned  
to WDT, a CLRWDT instruction will clear the prescaler  
along with the WDT. The prescaler is neither readable  
nor writable. On a RESET, the prescaler contains all  
'0's.  
EXAMPLE 6-2: CHANGING PRESCALER  
(WDTTIMER0)  
CLRWDT  
;Clear WDT and  
6.2.1  
SWITCHING PRESCALER ASSIGNMENT  
;prescaler  
MOVLW 'xxxx0xxx'  
;Select TMR0, new  
;prescale value and  
;clock source  
The prescaler assignment is fully under software control  
(i.e., it can be changed “on the fly” during program  
execution). To avoid an unintended device RESET, the  
OPTION  
FIGURE 6-6: BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER  
TCY ( = Fosc/4)  
Data Bus  
8
0
M
U
X
1
M
U
X
T0CKI  
pin  
1
Sync  
2
Cycles  
TMR0 reg  
0
T0SE  
T0CS  
PSA  
0
1
8-bit Prescaler  
M
U
X
8
Watchdog  
Timer  
8 - to - 1MUX  
PS2:PS0  
PSA  
1
0
WDT Enable bit  
MUX  
PSA  
WDT  
Time-Out  
Note: T0CS, T0SE, PSA, PS2:PS0 are bits in the OPTION register.  
DS40191A-page 24  
Preliminary  
1998 Microchip Technology Inc.  
 
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