PIC16CR54C
FIGURE 3-1: PIC16CR54C SERIES BLOCK DIAGRAM
9-11
T0CKI
PIN
OSC1 OSC2 MCLR
CONFIGURATION WORD
9-11
STACK 1
STACK2
ROM
512 X 12
“DISABLE” “OSC
PC
SELECT”
WATCHDOG
TIMER
12
2
“CODE
OSCILLATOR/
TIMING &
CONTROL
PROTECT”
INSTRUCTION
REGISTER
WDT TIME
OUT
CLKOUT
WDT/TMR0
PRESCALER
9
12
8
“SLEEP”
INSTRUCTION
DECODER
6
“OPTION”
OPTION REG.
FROM W
DIRECT ADDRESS
DIRECT RAM
ADDRESS
GENERAL
PURPOSE
REGISTER
FILE
5
8
(SRAM)
25 Bytes
STATUS
TMR0
FSR
8
DATA BUS
8
W
ALU
FROM W
8
FROM W
4
8
4
“TRIS 5”
“TRIS 6”
TRISB PORTB
TRISA PORTA
4
8
RA3:RA0
RB7:RB0
DS40191A-page 10
Preliminary
1998 Microchip Technology Inc.