PIC16CR54C
TABLE 4-1:
SPECIAL FUNCTION REGISTER SUMMARY
Value on
Power-On
Reset
Value on
MCLR and
WDT Reset
Address
Name
TRIS
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
N/A
N/A
00h
01h
I/O control registers (TRISA, TRISB)
1111 1111 1111 1111
--11 1111 --11 1111
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
OPTION
INDF
Contains control bits to configure Timer0 and Timer0/WDT prescaler
Uses contents of FSR to address data memory (not a physical register)
8-bit real-time clock/counter
TMR0
(1)
02h
PCL
Low order 8 bits of PC
1111 1111 1111 1111
0001 1xxx 000q quuu
1xxx xxxx 1uuu uuuu
---- xxxx ---- uuuu
xxxx xxxx uuuu uuuu
03h
04h
05h
06h
STATUS
FSR
PA2
PA1
PA0
TO
PD
Z
DC
C
Indirect data memory address pointer
PORTA
PORTB
—
—
—
—
RA3
RB3
RA2
RB2
RA1
RB1
RA0
RB0
RB7
RB6
RB5
RB4
Legend: Shaded boxes = unimplemented or unused, –= unimplemented, read as '0' (if applicable)
x= unknown, u= unchanged, q= see the tables in Section 7.7 for possible values.
Note 1: The upper byte of the Program Counter is not directly accessible. See Section 4.5
for an explanation of how to access these bits.
DS40191A-page 14
Preliminary
1998 Microchip Technology Inc.