PIC16F7X7
FIGURE 18-5:
EXTERNAL CLOCK TIMING
Q4
Q1
Q2
Q3
Q4
4
Q1
OSC1
CLKO
1
3
4
3
2
TABLE 18-4: EXTERNAL CLOCK TIMING REQUIREMENTS
Param
Symbol
Characteristic
Min
Typ†
Max
Units
Conditions
No.
FOSC
External CLKI Frequency
(Note 1)
DC
DC
DC
DC
0.1
4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TCY
1
20
32
4
MHz XT Oscillator mode
MHz HS Oscillator mode
kHz LP Oscillator mode
MHz RC Oscillator mode
MHz XT Oscillator mode
MHz HS Oscillator mode
kHz LP Oscillator mode
Oscillator Frequency
(Note 1)
4
20
200
—
—
—
—
5
1
TOSC
External CLKI Period
(Note 1)
1000
50
ns
ns
ms
ns
ns
ns
ms
ns
XT Oscillator mode
HS Oscillator mode
LP Oscillator mode
RC Oscillator mode
XT Oscillator mode
HS Oscillator mode
LP Oscillator mode
TCY = 4/FOSC
5
Oscillator Period
(Note 1)
250
250
50
10,000
250
—
5
2
3
TCY
Instruction Cycle Time
200
DC
(Note 1)
TOSL,
TOSH
External Clock in (OSC1)
High or Low Time
500
2.5
15
—
—
—
—
—
—
—
—
—
—
25
50
15
ns
ms
ns
ns
ns
ns
XT oscillator
LP oscillator
HS oscillator
XT oscillator
LP oscillator
HS oscillator
4
TOSR,
TOSF
External Clock in (OSC1)
Rise or Fall Time
—
—
†
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: Instruction cycle period (TCY) equals four times the input oscillator time base period. All specified values are
based on characterization data for that particular oscillator type, under standard operating conditions, with
the device executing code. Exceeding these specified limits may result in an unstable oscillator operation
and/or higher than expected current consumption. All devices are tested to operate at “min.” values with an
external clock applied to the OSC1/CLKI pin. When an external clock input is used, the “max.” cycle time
limit is “DC” (no clock) for all devices.
2004 Microchip Technology Inc.
DS30498C-page 223