PIC16F7X7
FIGURE 10-27:
BUS COLLISION DURING START CONDITION (SCL = 0)
SDA = 0, SCL = 1
TBRG
TBRG
SDA
SCL
SEN
Set SEN, enable Start
sequence if SDA = 1, SCL = 1
SCL = 0before SDA = 0,
bus collision occurs. Set BCLIF.
SCL = 0before BRG time-out,
bus collision occurs. Set BCLIF.
BCLIF
Interrupt cleared
in software
S
‘0’
‘0’
‘0’
‘0’
SSPIF
FIGURE 10-28:
BRG RESET DUE TO SDA ARBITRATION DURING START CONDITION
SDA = 0, SCL = 1
Set S
Set SSPIF
Less than TBRG
TBRG
SDA pulled low by other master.
Reset BRG and assert SDA.
SDA
SCL
S
SCL pulled low after BRG
time-out
SEN
Set SEN, enable Start
sequence if SDA = 1, SCL = 1
BCLIF
‘0’
S
SSPIF
Interrupts cleared
in software
SDA = 0, SCL = 1,
set SSPIF
2004 Microchip Technology Inc.
DS30498C-page 129