PIC16F62X
FIGURE 5-3: BLOCK DIAGRAM OF THE RA3/AN3 PIN
Data
Bus
Comparator Mode = 110
VDD
D
Q
Q
Comparator Output
VDD
WR
PORTA
1
0
CK
Data Latch
P
D
Q
RA3 Pin
N
WR
TRISA
CK
Q
VSS
VSS
TRIS Latch
Analog
Input Mode
Schmitt Trigger
Input Buffer
RD TRISA
Q
D
EN
RD PORTA
To Comparator
FIGURE 5-4: BLOCK DIAGRAM OF RA4/T0CKI PIN
Data
Bus
Comparator Mode = 110
D
Q
Q
Comparator Output
WR
PORTA
1
0
CK
Data Latch
D
Q
RA4 Pin
N
WR
TRISA
CK
TRIS Latch
Q
VSS
VSS
Schmitt Trigger
Input Buffer
RD TRISA
Q
D
EN
RD PORTA
TMR0 Clock Input
1999 Microchip Technology Inc.
Preliminary
DS40300B-page 29