PIC16F62X
The Power-Up Time delay will vary from chip to chip
and due to VDD, temperature and process variation.
See DC parameters for details.
14.5
Power-on Reset (POR), Power-up
Timer (PWRT), Oscillator Start-up
Timer (OST) and Brown-out Detect
(BOD)
14.5.3 OSCILLATOR START-UP TIMER (OST)
14.5.1 POWER-ON RESET (POR)
The Oscillator Start-Up Timer (OST) provides a 1024
oscillator cycle (from OSC1 input) delay after the
PWRT delay is over. This ensures that the crystal
oscillator or resonator has started and stabilized.
The on-chip POR circuit holds the chip in reset until
VDD has reached a high enough level for proper opera-
tion. To take advantage of the POR, just tie the MCLR
pin through a resistor to VDD. This will eliminate exter-
nal RC components usually needed to create Power-on
Reset. A maximum rise time for VDD is required. See
Electrical Specifications for details.
The OST time-out is invoked only for XT, LP and HS
modes and only on power-on reset or wake-up from
SLEEP.
14.5.4 BROWN-OUT DETECT (BOD)
The POR circuit does not produce an internal reset
when VDD declines.
The PIC16F62X members have on-chip Brown-out
Detect circuitry. A configuration bit, BODEN, can dis-
able (if clear/programmed) or enable (if set) the
Brown-out Detect circuitry. If VDD falls below 4.0V, refer
to VBOD parameter D005(VBOD) for greater than
parameter (TBOD) in Table 17.1, the brown-out situa-
tion will reset the chip. A reset is not guaranteed to
occur if VDD falls below 4.0V for less than parameter
(TBOD).
When the device starts normal operation (exits the
reset condition), device operating parameters (voltage,
frequency, temperature, etc.) must be met to ensure
operation. If these conditions are not met, the device
must be held in reset until the operating conditions are
met.
For additional information, refer to Application Note
AN607 “Power-up Trouble Shooting”.
On any reset (Power-on, Brown-out, Watchdog, etc.)
the chip will remain in Reset until VDD rises above
BVDD. The Power-up Timer will now be invoked and will
keep the chip in reset an additional 72 ms.
14.5.2 POWER-UP TIMER (PWRT)
The Power-up Timer provides a fixed 72 ms (nominal)
time-out on power-up only, from POR or Brown-out
Reset. The Power-up Timer operates on an internal RC
oscillator. The chip is kept in reset as long as PWRT is
active. The PWRT delay allows the VDD to rise to an
acceptable level. A configuration bit, PWRTE can
disable (if set) or enable (if cleared or programmed) the
Power-up Timer. The Power-up Timer should always be
enabled when Brown-out Reset is enabled.
If VDD drops below BVDD while the Power-up Timer is
running, the chip will go back into a Brown-out Reset
and the Power-up Timer will be re-initialized. Once VDD
rises above BVDD, the Power-Up Timer will execute a
72 ms reset. The Power-up Timer should always be
enabled when Brown-out Detect is enabled.
Figure 14-9 shows typical Brown-out situations.
FIGURE 14-9: BROWN-OUT SITUATIONS
VDD
BVDD
Internal
Reset
72 ms
VDD
BVDD
Internal
Reset
<72 ms
72 ms
VDD
BVDD
Internal
Reset
72 ms
1999 Microchip Technology Inc.
Preliminary
DS40300B-page 101
MICROCHIP [ MICROCHIP ]
