PIC16CR54C
4.5
Program Counter
FIGURE 4-5: LOADING OF PC
BRANCH INSTRUCTIONS -
PIC16CR54C
As a program instruction is executed, the Program
Counter (PC) will contain the address of the next
program instruction to be executed. The PC value is
increased by one every instruction cycle, unless an
instruction changes the PC.
GOTO Instruction
8
7
0
PCL
PC
For a GOTOinstruction, bits 8:0 of the PC are provided
by the GOTO instruction word. The PC Latch (PCL) is
mapped to PC<7:0> (Figure 4-5 and Figure 4-6).
Instruction Word
For a CALL instruction, or any instruction where the
PCL is the destination, bits 7:0 of the PC again are
provided by the instruction word. However, PC<8>
does not come from the instruction word, but is always
cleared (Figure 4-10 and Figure 4-11)/
CALL or Modify PCL Instruction
8
7
0
PCL
PC
Instructions where the PCL is the destination, or
Modify PCL instructions, include MOVWF PC, ADDWF
PC, and BSF PC, 5.
Reset to '0'
Instruction Word
4.5.1
EFFECTS OF RESET
.
Note: Because PC<8> is cleared in the CALL
instruction, or any Modify PCL instruction,
all subroutine calls or computed jumps are
limited to the first 256 locations of any pro-
gram memory page (512 words long).
The Program Counter is set upon a RESET, which
means that the PC addresses the last location in the
last page i.e., the reset vector.
The STATUS register page preselect bits are cleared
upon
a RESET, which means that page 0 is
pre-selected.
Therefore, upon a RESET, a GOTO instruction at the
reset vector location will automatically cause the
program to jump to page 0.
4.6
Stack
PIC16CR54C device has a 9-bit, two-level hardware
push/pop stack (Figure 4-1).
A CALLinstruction will push the current value of stack
1 into stack 2 and then push the current program
counter value, incremented by one, into stack level 1. If
more than two sequential CALL’s are executed, only
the most recent two return addresses are stored.
A RETLWinstruction will pop the contents of stack level
1 into the program counter and then copy stack level 2
contents into level 1. If more than two sequential
RETLW’s are executed, the stack will be filled with the
address previously stored in level 2. Note that the
W register will be loaded with the literal value specified
in the instruction. This is particularly useful for the
implementation of data look-up tables within the
program memory.
1998 Microchip Technology Inc.
Preliminary
DS40191A-page 17
MICROCHIP [ MICROCHIP ]
