PIC16F62X
TABLE 4-4:
SPECIAL FUNCTION REGISTERS SUMMARY BANK3
Value on
all other
resets(1)
Value on
POR
Reset
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bank 1
180h
INDF
OPTION
Addressing this location uses contents of FSR to address data memory (not a physical reg- xxxx xxxx
ister)
xxxx xxxx
181h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch
18Dh
18Eh
18Fh
190h
191h
192h
193h
194h
195h
196h
197h
198h
199h
19Ah
19Bh
19Ch
19Dh
19Eh
19Fh
RBPU
Program Counter’s (PC) Least Significant Byte
IRP RP1 RP0 TO
Indirect data memory address pointer
INTEDG
T0CS
T0SE
PSA
PD
PS2
Z
PS1
DC
PS0
C
1111 1111
0000 0000
0001 1xxx
xxxx xxxx
—
1111 1111
0000 0000
000q quuu
uuuu uuuu
—
PCL
STATUS
FSR
Unimplemented
TRISB
TRISB7 TRISB6
TRISB5 TRISB4 TRISB3 TRISB2
TRISB1
TRISB0
1111 1111
—
1111 1111
—
Unimplemented
Unimplemented
Unimplemented
PCLATH
—
—
—
—
—
—
—
Write buffer for upper 5 bits of program counter
INTE RBIE T0IF INTF RBIF
---0 0000
0000 000x
---0 0000
0000 000u
INTCON
GIE
PEIE
T0IE
Legend: — = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition,
shaded = unimplemented
Note 1: Other (non power-up) resets include MCLR Reset, Brown-out Detect and Watchdog Timer Reset during
normal operation.
DS40300B-page 18
Preliminary
1999 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
