PIC16C745/765
13.5
Time-out in Various Situations
TABLE 13-3: RESET TIME-OUTS
POR
BORt
Oscillator
Wake-up
Configuration
from SLEEP
PWRTE = 0
PWRTE = 1
1024•TOSC
PWRTE = 0
PWRTE = 1
1024•TOSC
HS
H4
TPWRT + 1024•TOSC
TPWRT + 1024•TOSC
1024•TOSC
TPWRT + TPLLRT +
TPLLRT + 1024•TOSC
TPWRT + TPLLRT +
TPLLRT + 1024•TOSC
TPLLRT +
1024•TOSC
1024•TOSC
1024•TOSC
EC
E4
TPWRT
0
TPWRT
0
0
TPWRT + TPLLRT
TPLLRT
TPWRT + TPLLRT
TPLLRT
TPLLRT
TABLE 13-4: STATUS BITS AND THEIR SIGNIFICANCE
POR
0
BOR
TO
1
PD
1
x
x
x
0
1
1
1
1
Power-on Reset
0
0
x
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Reset
0
x
0
1
1
1
1
0
1
WDT Reset
1
0
0
WDT Wake-up
1
u
u
MCLR Reset during normal operation
1
1
0
MCLR Reset during SLEEP or interrupt wake-up from SLEEP
TABLE 13-5: RESET CONDITION FOR SPECIAL REGISTERS
Program
Condition
STATUS
Register
PCON
Register
Counter
Power-on Reset
000h
000h
0001 1xxx
000u uuuu
0001 0uuu
0000 1uuu
uuu0 0uuu
000x xuuu
uuu1 0uuu
---- --0x
---- --uu
---- --uu
---- --uu
---- --uu
---- --u0
---- --uu
MCLR Reset during normal operation
MCLR Reset during SLEEP
WDT Reset
000h
000h
WDT Wake-up
PC + 1
Brown-out Reset
000h
Interrupt wake-up from SLEEP
PC + 1(1)
Legend: u= unchanged, x= unknown, -= unimplemented bit read as ’0’.
Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
TABLE 13-6: REGISTERS ASSOCIATED WITH RESETS
Value on:
POR, BOR
Value on all
other resets
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
03h, 83h,
103h, 183h
Status
PCON
IRP
RP1
RP0
TO
PD
Z
DC
C
0001 1xxx
000q quuu
POR
BOR
8Eh
—
—
—
—
—
—
---- --qq ---- --uu
Legend: x= unknown, u= unchanged, -= unimplemented locations read as '0'.
DS41124A-page 100
Advanced Information
1999 Microchip Technology Inc.