PIC16C55X(A)
Power-On Reset (POR) ......................................................40
Power-up Timer (PWRT).....................................................40
Prescaler.............................................................................32
PRO MATE II Universal Programmer...............................63
Program Memory Organization...........................................13
LIST OF FIGURES
Figure 3-1:
Figure 3-2:
Figure 4-1:
BlocK Diagram ........................................... 10
Clock/Instruction Cycle............................... 12
Program Memory Map and Stack for the
PIC16C554/PIC6C554(A) .......................... 13
Program Memory Map and Stack for the
PIC16C556(A)............................................ 13
Program Memory Map and Stack for the
PIC16C558/PIC16C558(A) ........................ 13
Data Memory Map for the
PIC16C554/554(A)..................................... 15
Data Memory Map for the
PIC16C558/558(A)..................................... 15
STATUS Register (Address
Q
Figure 4-2:
Figure 4-3:
Figure 4-4:
Figure 4-5:
Figure 4-6:
Quick-Turnaround-Production (QTP) Devices ......................7
R
RC Oscillator.......................................................................38
Reset...................................................................................39
RETFIE Instruction..............................................................59
RETLW Instruction..............................................................59
RETURN Instruction............................................................60
RLF Instruction....................................................................60
RRF Instruction ...................................................................60
03h or 83h)................................................. 17
OPTION Register (address 81h)................ 18
INTCON Register (address 0Bh
Figure 4-7:
Figure 4-8:
S
SEEVAL Evaluation and Programming System...............65
Serialized Quick-Turnaround-Production (SQTP) Devices...7
SLEEP Instruction...............................................................60
Software Simulator (MPLAB-SIM).......................................65
Special Features of the CPU...............................................35
Special Function Registers .................................................16
Stack ...................................................................................21
Status Register....................................................................17
SUBLW Instruction..............................................................61
SUBWF Instruction..............................................................61
SWAPF Instruction..............................................................62
or 8Bh)........................................................ 19
PCON Register (Address 8Eh)................... 20
Figure 4-10: Loading Of PC In Different Situations ........ 21
Figure 4-11: Direct/indirect Addressing
Figure 4-9:
PIC16C55X(A)............................................ 22
Block Diagram of
Figure 5-1:
PORT pins RA<3:0>................................... 23
Block Diagram of RA4 Pin.......................... 23
Block Diagram of RB7:RB4 Pins................ 25
Block Diagram of RB3:RB0 Pins................ 25
Successive I/O Operation........................... 27
TIMER0 Block Diagram.............................. 29
TIMER0 (TMR0) Timing: Internal
Figure 5-2:
Figure 5-3:
Figure 5-4:
Figure 5-5:
Figure 6-1:
Figure 6-2:
T
Timer0
Clock/No PrescaleR ................................... 29
TIMER0 Timing: Internal Clock/
Prescale 1:2 ............................................... 30
TIMER0 Interrupt Timing............................ 30
TIMER0 Timing With External Clock.......... 31
Block Diagram of thE Timer0/WDT
Prescaler .................................................... 32
Configuration Word .................................... 36
Crystal Operation (or Ceramic Resonator)
(HS, XT or LP Osc Configuration).............. 37
External Clock Input Operation
(HS, XT or LP Osc Configuration).............. 37
External Parallel Resonant Crystal
Oscillator Circuit ......................................... 38
External Series Resonant Crystal
Oscillator Circuit ......................................... 38
RC Oscillator Mode .................................... 38
Simplified Block Diagram of On-chip
TIMER0.......................................................................29
TIMER0 (TMR0) Interrupt ...........................................29
TIMER0 (TMR0) Module.............................................29
TMR0 with External Clock...........................................31
Timer1
Switching Prescaler Assignment.................................33
Timing Diagrams and Specifications...................................74
TMR0 Interrupt....................................................................46
TRIS Instruction ..................................................................62
TRISA..................................................................................23
TRISB..................................................................................25
Figure 6-3:
Figure 6-4:
Figure 6-5:
Figure 6-6:
Figure 7-1:
Figure 7-2:
Figure 7-3:
Figure 7-4:
Figure 7-5:
W
Watchdog Timer (WDT) ......................................................47
X
XORLW Instruction .............................................................62
XORWF Instruction .............................................................62
Figure 7-6:
Figure 7-7:
Reset Circuit............................................... 39
Time-out Sequence on Power-up
(MCLR not tied to VDD): Case 1 ................. 43
Time-out Sequence on Power-up
LIST OF EXAMPLES
Figure 7-8:
Figure 7-9:
Example 3-1: Instruction Pipeline Flow .................... 12
Example 4-1: Ndirect Addressing............................. 22
Example 5-1: Read-Modify-Write Instructions
on an I/O Port..................................... 27
Example 6-1: Changing Prescaler
(Timer0→WDT)................................... 33
Example 6-2: Changing prescaler
(WDT→Timer0)................................... 33
Example 7-1: Saving the Status and W Registers
in RAM ............................................. 47
(MCLR not tied to VDD): Case 2 ................. 43
Figure 7-10: Time-out Sequence on Power-up
(MCLR tied to VDD)..................................... 43
Figure 7-11: External Power-on Reset Circuit
(For Slow VDD Power-up)........................... 44
Figure 7-12: Interrupt Logic ............................................ 45
Figure 7-13: INT Pin Interrupt Timing ............................. 46
Figure 7-14: Watchdog Timer Block Diagram................. 48
Figure 7-15: Summary of Watchdog Timer
Registers .................................................... 48
Figure 7-16: Wake-up from Sleep Through
Interrupt...................................................... 49
Figure 7-17: Typical In-Circuit Serial Programming
Connection ................................................. 50
DS40143B-page 90
Preliminary
1997 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
