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PIC16F73-I/SPG 参数 Datasheet PDF下载

PIC16F73-I/SPG图片预览
型号: PIC16F73-I/SPG
PDF下载: 下载PDF文件 查看货源
内容描述: [28 Pin, 7KB Std Flash, 192 RAM, 22 I/O, -40C to +85C, 28-SPDIP, TUBE]
分类和应用: 闪存微控制器
文件页数/大小: 174 页 / 3853 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC16F7X  
In Timer mode, Timer1 increments every instruction  
cycle. In Counter mode, it increments on every rising  
edge of the external clock input.  
6.0  
TIMER1 MODULE  
The Timer1 module is a 16-bit timer/counter consisting  
of two 8-bit registers (TMR1H and TMR1L), which are  
readable and writable. The TMR1 Register pair  
(TMR1H:TMR1L) increments from 0000h to FFFFh  
and rolls over to 0000h. The TMR1 Interrupt, if enabled,  
is generated on overflow, which is latched in interrupt  
flag bit TMR1IF (PIR1<0>). This interrupt can be  
enabled/disabled by setting/clearing TMR1 interrupt  
enable bit TMR1IE (PIE1<0>).  
Timer1 can be enabled/disabled by setting/clearing  
control bit TMR1ON (T1CON<0>).  
Timer1 also has an internal RESET input. This  
RESET can be generated by either of the two CCP  
modules as the special event trigger (see Sections 8.1  
and 8.2). Register 6-1 shows the Timer1 Control  
register.  
When the Timer1 oscillator is enabled (T1OSCEN is  
set), the RC1/T1OSI/CCP2 and RC0/T1OSO/T1CKI  
pins become inputs. That is, the TRISC<1:0> value is  
ignored and these pins read as 0.  
Timer1 can operate in one of two modes:  
As a timer  
As a counter  
The operating mode is determined by the clock select  
bit, TMR1CS (T1CON<1>).  
Additional information on timer modules is available in  
the PICmicroMid-Range MCU Family Reference  
Manual (DS33023).  
REGISTER 6-1:  
T1CON: TIMER1 CONTROL REGISTER (ADDRESS 10h)  
U-0  
U-0  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON  
bit 0  
bit 7  
bit 7-6  
bit 5-4  
Unimplemented: Read as 0’  
T1CKPS1:T1CKPS0: Timer1 Input Clock Prescale Select bits  
11= 1:8 Prescale value  
10= 1:4 Prescale value  
01= 1:2 Prescale value  
00= 1:1 Prescale value  
bit 3  
bit 2  
T1OSCEN: Timer1 Oscillator Enable Control bit  
1= Oscillator is enabled  
0= Oscillator is shut-off (the oscillator inverter is turned off to eliminate power drain)  
T1SYNC: Timer1 External Clock Input Synchronization Control bit  
TMR1CS = 1:  
1= Do not synchronize external clock input  
0= Synchronize external clock input  
TMR1CS = 0:  
This bit is ignored. Timer1 uses the internal clock when TMR1CS = 0.  
bit 1  
bit 0  
TMR1CS: Timer1 Clock Source Select bit  
1= External clock from pin RC0/T1OSO/T1CKI (on the rising edge)  
0= Internal clock (FOSC/4)  
TMR1ON: Timer1 On bit  
1= Enables Timer1  
0= Stops Timer1  
Legend:  
R = Readable bit  
W = Writable bit  
U = Unimplemented bit, read as 0’  
0= Bit is cleared x = Bit is unknown  
- n = Value at POR reset  
1= Bit is set  
2002 Microchip Technology Inc.  
DS30325B-page 47