PIC16F7X
FIGURE 15-17:
USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
121
121
RC7/RX/DT
pin
120
122
Note: Refer to Figure 15-3 for load conditions.
TABLE 15-10: USART SYNCHRONOUS TRANSMISSION REQUIREMENTS
Param
Symbol
Characteristic
Min Typ† Max Units Conditions
No.
120
TckH2dtV SYNC XMIT (MASTER &
SLAVE)
Standard(F)
—
—
—
—
—
—
—
—
—
—
—
—
80
100
45
ns
ns
ns
ns
ns
ns
Clock high to data out valid
Extended(LF)
121
122
Tckrf
Tdtrf
Clock out rise time and fall Standard(F)
time (Master mode)
Extended(LF)
50
Data out rise time and fall Standard(F)
time
45
Extended(LF)
50
†
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
FIGURE 15-18:
USART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
125
RC7/RX/DT
pin
126
Note: Refer to Figure 15-3 for load conditions.
TABLE 15-11: USART SYNCHRONOUS RECEIVE REQUIREMENTS
Parameter
Symbol
Characteristic
Min
Typ†
Max
Units Conditions
No.
125
TdtV2ckL SYNC RCV (MASTER & SLAVE)
Data setup before CK↓ (DT setup time)
15
15
—
—
—
—
ns
ns
126
TckL2dtl
Data hold after CK↓ (DT hold time)
†
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only
and are not tested.
2002 Microchip Technology Inc.
DS30325B-page 137
MICROCHIP [ MICROCHIP ]
